[assembler] Split out CPUFeatures into its own file

This reduces the preprocessor expanded source size by 84,675 LoC:

gen         (   20 files):    71,349 to    1,523,934 (   21x)
src         (  624 files):   367,410 to   53,253,894 (  145x)
test        (  392 files):   490,503 to   37,436,176 (   76x)
third_party (  432 files):   239,085 to    9,547,902 (   40x)
total       ( 1520 files): 1,183,031 to  102,736,424 (   87x)

to

gen         (   20 files):    71,349 to    1,523,794 (   21x)
src         (  624 files):   367,411 to   53,186,896 (  145x)
test        (  392 files):   490,504 to   37,418,639 (   76x)
third_party (  432 files):   239,085 to    9,547,902 (   40x)
total       ( 1520 files): 1,183,033 to  102,651,749 (   87x)


Change-Id: Ia8a79092051a42815b65e86a0784297915368c9b
Reviewed-on: https://chromium-review.googlesource.com/c/1291471
Reviewed-by: Ulan Degenbaev <ulan@chromium.org>
Reviewed-by: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: Marja Hölttä <marja@chromium.org>
Commit-Queue: Sigurd Schneider <sigurds@chromium.org>
Cr-Commit-Position: refs/heads/master@{#58266}

BUILD.gn

@@ -1994,6 +1994,7 @@ v8_source_set("v8_base") {
     "src/counters-inl.h",
     "src/counters.cc",
     "src/counters.h",
+    "src/cpu-features.h",
     "src/date.cc",
     "src/date.h",
     "src/dateparser-inl.h",

src/arm/cpu-arm.cc

@@ -14,8 +14,7 @@
 
 #if V8_TARGET_ARCH_ARM
 
-#include "src/assembler.h"
-#include "src/macro-assembler.h"
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

src/arm/simulator-arm.h

@@ -21,7 +21,6 @@
 // Running with a simulator.
 
 #include "src/arm/constants-arm.h"
-#include "src/assembler.h"
 #include "src/base/hashmap.h"
 #include "src/simulator-base.h"
 

src/arm64/codegen-arm64.cc

@@ -4,11 +4,7 @@
 
 #if V8_TARGET_ARCH_ARM64
 
-#include "src/arm64/assembler-arm64-inl.h"
-#include "src/arm64/macro-assembler-arm64-inl.h"
-#include "src/arm64/simulator-arm64.h"
 #include "src/codegen.h"
-#include "src/macro-assembler.h"
 
 namespace v8 {
 namespace internal {

src/arm64/cpu-arm64.cc

@@ -6,8 +6,7 @@
 
 #if V8_TARGET_ARCH_ARM64
 
-#include "src/arm64/utils-arm64.h"
-#include "src/assembler.h"
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

src/assembler.h

@@ -38,6 +38,7 @@
 #include <forward_list>
 
 #include "src/code-comments.h"
+#include "src/cpu-features.h"
 #include "src/deoptimize-reason.h"
 #include "src/external-reference.h"
 #include "src/flags.h"
@@ -375,65 +376,6 @@ class CpuFeatureScope {
 #endif
 };
 
-// CpuFeatures keeps track of which features are supported by the target CPU.
-// Supported features must be enabled by a CpuFeatureScope before use.
-// Example:
-//   if (assembler->IsSupported(SSE3)) {
-//     CpuFeatureScope fscope(assembler, SSE3);
-//     // Generate code containing SSE3 instructions.
-//   } else {
-//     // Generate alternative code.
-//   }
-class CpuFeatures : public AllStatic {
- public:
-  static void Probe(bool cross_compile) {
-    STATIC_ASSERT(NUMBER_OF_CPU_FEATURES <= kBitsPerInt);
-    if (initialized_) return;
-    initialized_ = true;
-    ProbeImpl(cross_compile);
-  }
-
-  static unsigned SupportedFeatures() {
-    Probe(false);
-    return supported_;
-  }
-
-  static bool IsSupported(CpuFeature f) {
-    return (supported_ & (1u << f)) != 0;
-  }
-
-  static inline bool SupportsOptimizer();
-
-  static inline bool SupportsWasmSimd128();
-
-  static inline unsigned icache_line_size() {
-    DCHECK_NE(icache_line_size_, 0);
-    return icache_line_size_;
-  }
-
-  static inline unsigned dcache_line_size() {
-    DCHECK_NE(dcache_line_size_, 0);
-    return dcache_line_size_;
-  }
-
-  static void PrintTarget();
-  static void PrintFeatures();
-
- private:
-  friend class ExternalReference;
-  friend class AssemblerBase;
-  // Flush instruction cache.
-  static void FlushICache(void* start, size_t size);
-
-  // Platform-dependent implementation.
-  static void ProbeImpl(bool cross_compile);
-
-  static unsigned supported_;
-  static unsigned icache_line_size_;
-  static unsigned dcache_line_size_;
-  static bool initialized_;
-  DISALLOW_COPY_AND_ASSIGN(CpuFeatures);
-};
 
 // -----------------------------------------------------------------------------
 // Utility functions

src/compiler/common-operator.cc

@@ -4,7 +4,6 @@
 
 #include "src/compiler/common-operator.h"
 
-#include "src/assembler.h"
 #include "src/base/lazy-instance.h"
 #include "src/compiler/linkage.h"
 #include "src/compiler/node.h"

src/compiler/memory-optimizer.cc

@@ -10,6 +10,7 @@
 #include "src/compiler/node-properties.h"
 #include "src/compiler/node.h"
 #include "src/compiler/simplified-operator.h"
+#include "src/interface-descriptors.h"
 
 namespace v8 {
 namespace internal {

src/compiler/raw-machine-assembler.h

@@ -14,6 +14,7 @@
 #include "src/compiler/operator.h"
 #include "src/globals.h"
 #include "src/heap/factory.h"
+#include "src/isolate.h"
 
 namespace v8 {
 namespace internal {

src/compiler/wasm-compiler.cc

@@ -33,6 +33,7 @@
 #include "src/compiler/zone-stats.h"
 #include "src/counters.h"
 #include "src/heap/factory.h"
+#include "src/interface-descriptors.h"
 #include "src/isolate-inl.h"
 #include "src/log-inl.h"
 #include "src/optimized-compilation-info.h"

src/cpu-features.h

@@ -0,0 +1,124 @@
+// Copyright 2018 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#ifndef V8_CPU_FEATURES_H_
+#define V8_CPU_FEATURES_H_
+
+#include "src/globals.h"
+
+namespace v8 {
+
+namespace internal {
+
+// CPU feature flags.
+enum CpuFeature {
+  // x86
+  SSE4_1,
+  SSSE3,
+  SSE3,
+  SAHF,
+  AVX,
+  FMA3,
+  BMI1,
+  BMI2,
+  LZCNT,
+  POPCNT,
+  ATOM,
+  // ARM
+  // - Standard configurations. The baseline is ARMv6+VFPv2.
+  ARMv7,        // ARMv7-A + VFPv3-D32 + NEON
+  ARMv7_SUDIV,  // ARMv7-A + VFPv4-D32 + NEON + SUDIV
+  ARMv8,        // ARMv8-A (+ all of the above)
+  // MIPS, MIPS64
+  FPU,
+  FP64FPU,
+  MIPSr1,
+  MIPSr2,
+  MIPSr6,
+  MIPS_SIMD,  // MSA instructions
+  // PPC
+  FPR_GPR_MOV,
+  LWSYNC,
+  ISELECT,
+  VSX,
+  MODULO,
+  // S390
+  DISTINCT_OPS,
+  GENERAL_INSTR_EXT,
+  FLOATING_POINT_EXT,
+  VECTOR_FACILITY,
+  MISC_INSTR_EXT2,
+
+  NUMBER_OF_CPU_FEATURES,
+
+  // ARM feature aliases (based on the standard configurations above).
+  VFPv3 = ARMv7,
+  NEON = ARMv7,
+  VFP32DREGS = ARMv7,
+  SUDIV = ARMv7_SUDIV
+};
+
+// CpuFeatures keeps track of which features are supported by the target CPU.
+// Supported features must be enabled by a CpuFeatureScope before use.
+// Example:
+//   if (assembler->IsSupported(SSE3)) {
+//     CpuFeatureScope fscope(assembler, SSE3);
+//     // Generate code containing SSE3 instructions.
+//   } else {
+//     // Generate alternative code.
+//   }
+class CpuFeatures : public AllStatic {
+ public:
+  static void Probe(bool cross_compile) {
+    STATIC_ASSERT(NUMBER_OF_CPU_FEATURES <= kBitsPerInt);
+    if (initialized_) return;
+    initialized_ = true;
+    ProbeImpl(cross_compile);
+  }
+
+  static unsigned SupportedFeatures() {
+    Probe(false);
+    return supported_;
+  }
+
+  static bool IsSupported(CpuFeature f) {
+    return (supported_ & (1u << f)) != 0;
+  }
+
+  static inline bool SupportsOptimizer();
+
+  static inline bool SupportsWasmSimd128();
+
+  static inline unsigned icache_line_size() {
+    DCHECK_NE(icache_line_size_, 0);
+    return icache_line_size_;
+  }
+
+  static inline unsigned dcache_line_size() {
+    DCHECK_NE(dcache_line_size_, 0);
+    return dcache_line_size_;
+  }
+
+  static void PrintTarget();
+  static void PrintFeatures();
+
+ private:
+  friend class ExternalReference;
+  friend class AssemblerBase;
+  // Flush instruction cache.
+  static void FlushICache(void* start, size_t size);
+
+  // Platform-dependent implementation.
+  static void ProbeImpl(bool cross_compile);
+
+  static unsigned supported_;
+  static unsigned icache_line_size_;
+  static unsigned dcache_line_size_;
+  static bool initialized_;
+  DISALLOW_COPY_AND_ASSIGN(CpuFeatures);
+};
+
+}  // namespace internal
+}  // namespace v8
+#endif  // V8_CPU_FEATURES_H_

src/eh-frame.h

@@ -5,9 +5,9 @@
 #ifndef V8_EH_FRAME_H_
 #define V8_EH_FRAME_H_
 
+#include "src/assembler-arch.h"
 #include "src/base/compiler-specific.h"
 #include "src/globals.h"
-#include "src/macro-assembler.h"
 #include "src/zone/zone-containers.h"
 
 namespace v8 {

src/flags.cc

@@ -10,11 +10,12 @@
 #include <sstream>
 
 #include "src/allocation.h"
-#include "src/assembler.h"
 #include "src/base/functional.h"
 #include "src/base/platform/platform.h"
+#include "src/cpu-features.h"
 #include "src/memcopy.h"
 #include "src/ostreams.h"
+#include "src/utils.h"
 #include "src/wasm/wasm-limits.h"
 
 namespace v8 {

src/globals.h

@@ -924,54 +924,6 @@ constexpr int kIeeeDoubleExponentWordOffset = 0;
   (((value) + kDoubleAlignmentMask) & ~kDoubleAlignmentMask)
 
 
-// CPU feature flags.
-enum CpuFeature {
-  // x86
-  SSE4_1,
-  SSSE3,
-  SSE3,
-  SAHF,
-  AVX,
-  FMA3,
-  BMI1,
-  BMI2,
-  LZCNT,
-  POPCNT,
-  ATOM,
-  // ARM
-  // - Standard configurations. The baseline is ARMv6+VFPv2.
-  ARMv7,        // ARMv7-A + VFPv3-D32 + NEON
-  ARMv7_SUDIV,  // ARMv7-A + VFPv4-D32 + NEON + SUDIV
-  ARMv8,        // ARMv8-A (+ all of the above)
-  // MIPS, MIPS64
-  FPU,
-  FP64FPU,
-  MIPSr1,
-  MIPSr2,
-  MIPSr6,
-  MIPS_SIMD,  // MSA instructions
-  // PPC
-  FPR_GPR_MOV,
-  LWSYNC,
-  ISELECT,
-  VSX,
-  MODULO,
-  // S390
-  DISTINCT_OPS,
-  GENERAL_INSTR_EXT,
-  FLOATING_POINT_EXT,
-  VECTOR_FACILITY,
-  MISC_INSTR_EXT2,
-
-  NUMBER_OF_CPU_FEATURES,
-
-  // ARM feature aliases (based on the standard configurations above).
-  VFPv3 = ARMv7,
-  NEON = ARMv7,
-  VFP32DREGS = ARMv7,
-  SUDIV = ARMv7_SUDIV
-};
-
 // Defines hints about receiver values based on structural knowledge.
 enum class ConvertReceiverMode : unsigned {
   kNullOrUndefined,     // Guaranteed to be null or undefined.
@@ -1755,6 +1707,13 @@ static inline bool IsGrowStoreMode(KeyedAccessStoreMode store_mode) {
 }
 
 enum IcCheckType { ELEMENT, PROPERTY };
+
+// Helper stubs can be called in different ways depending on where the target
+// code is located and how the call sequence is expected to look like:
+//  - JavaScript: Call on-heap {Code} object via {RelocInfo::CODE_TARGET}.
+//  - WebAssembly: Call native {WasmCode} stub via {RelocInfo::WASM_STUB_CALL}.
+enum class StubCallMode { kCallOnHeapBuiltin, kCallWasmRuntimeStub };
+
 }  // namespace internal
 }  // namespace v8
 

src/heap/factory.cc

@@ -17,7 +17,6 @@
 #include "src/heap/mark-compact-inl.h"
 #include "src/interpreter/interpreter.h"
 #include "src/isolate-inl.h"
-#include "src/macro-assembler.h"
 #include "src/objects/api-callbacks.h"
 #include "src/objects/arguments-inl.h"
 #include "src/objects/bigint.h"

src/heap/objects-visiting-inl.h

@@ -10,7 +10,6 @@
 #include "src/heap/array-buffer-tracker.h"
 #include "src/heap/embedder-tracing.h"
 #include "src/heap/mark-compact.h"
-#include "src/macro-assembler.h"
 #include "src/objects-body-descriptors-inl.h"
 #include "src/objects-inl.h"
 #include "src/objects/js-weak-refs-inl.h"

src/ia32/cpu-ia32.cc

@@ -10,8 +10,7 @@
 
 #if V8_TARGET_ARCH_IA32
 
-#include "src/assembler.h"
-#include "src/macro-assembler.h"
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

src/mips/constants-mips.h

@@ -4,7 +4,7 @@
 
 #ifndef V8_MIPS_CONSTANTS_MIPS_H_
 #define V8_MIPS_CONSTANTS_MIPS_H_
-#include "src/globals.h"
+#include "src/cpu-features.h"
 // UNIMPLEMENTED_ macro for MIPS.
 #ifdef DEBUG
 #define UNIMPLEMENTED_MIPS()                                                  \

src/mips/cpu-mips.cc

@@ -13,10 +13,7 @@
 
 #if V8_TARGET_ARCH_MIPS
 
-#include "src/assembler.h"
-#include "src/macro-assembler.h"
-
-#include "src/simulator.h"  // For cache flushing.
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

src/mips64/cpu-mips64.cc

@@ -13,10 +13,7 @@
 
 #if V8_TARGET_ARCH_MIPS64
 
-#include "src/assembler.h"
-#include "src/macro-assembler.h"
-
-#include "src/simulator.h"  // For cache flushing.
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

src/ppc/cpu-ppc.cc

@@ -6,8 +6,7 @@
 
 #if V8_TARGET_ARCH_PPC
 
-#include "src/assembler.h"
-#include "src/macro-assembler.h"
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

src/s390/cpu-s390.cc

@@ -3,10 +3,9 @@
 // found in the LICENSE file.
 
 // CPU specific code for s390 independent of OS goes here.
-#include "src/v8.h"
-
 #if V8_TARGET_ARCH_S390
-#include "src/assembler.h"
+
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

src/turbo-assembler.h

@@ -124,12 +124,6 @@ class HardAbortScope {
   bool old_value_;
 };
 
-// Helper stubs can be called in different ways depending on where the target
-// code is located and how the call sequence is expected to look like:
-//  - JavaScript: Call on-heap {Code} object via {RelocInfo::CODE_TARGET}.
-//  - WebAssembly: Call native {WasmCode} stub via {RelocInfo::WASM_STUB_CALL}.
-enum class StubCallMode { kCallOnHeapBuiltin, kCallWasmRuntimeStub };
-
 #ifdef DEBUG
 struct CountIfValidRegisterFunctor {
   template <typename RegType>

src/wasm/baseline/liftoff-compiler.cc

@@ -10,6 +10,7 @@
 #include "src/compiler/linkage.h"
 #include "src/compiler/wasm-compiler.h"
 #include "src/counters.h"
+#include "src/interface-descriptors.h"
 #include "src/macro-assembler-inl.h"
 #include "src/objects/smi.h"
 #include "src/tracing/trace-event.h"

src/x64/cpu-x64.cc

@@ -10,8 +10,7 @@
 
 #if V8_TARGET_ARCH_X64
 
-#include "src/assembler.h"
-#include "src/macro-assembler.h"
+#include "src/cpu-features.h"
 
 namespace v8 {
 namespace internal {

test/cctest/test-dictionary.cc

@@ -34,7 +34,6 @@
 #include "src/global-handles.h"
 #include "src/heap/factory.h"
 #include "src/heap/spaces.h"
-#include "src/macro-assembler.h"
 #include "src/objects-inl.h"
 #include "src/objects/hash-table-inl.h"
 #include "test/cctest/heap/heap-utils.h"