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Refactor atomic ops to distinguish Int32/Int64 ops

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Currently, atomic operations assume the default to be 32-bit
operations, fix opcode names for differentiation between 32/64-bit
operations.

Bug: v8:6532
Change-Id: Idc7df4e191f54b125271b067891e0a1df07008a4
Reviewed-on: https://chromium-review.googlesource.com/924333
Reviewed-by: Jaroslav Sevcik <jarin@chromium.org>
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#51532}
This commit is contained in:
Deepti Gandluri 2018-02-21 15:59:40 -08:00 committed by Commit Bot
parent ac790b1132
commit 3db1d4a55e
26 changed files with 682 additions and 661 deletions
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46
src/compiler/arm/code-generator-arm.cc
View File

@ -2587,95 +2587,95 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ ExtractLane(i.OutputRegister(), scratch, NeonS8, 0);
break;
}
case kAtomicLoadInt8:
case kWord32AtomicLoadInt8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(ldrsb);
break;
case kAtomicLoadUint8:
case kWord32AtomicLoadUint8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(ldrb);
break;
case kAtomicLoadInt16:
case kWord32AtomicLoadInt16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(ldrsh);
break;
case kAtomicLoadUint16:
case kWord32AtomicLoadUint16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(ldrh);
break;
case kAtomicLoadWord32:
case kWord32AtomicLoadWord32:
ASSEMBLE_ATOMIC_LOAD_INTEGER(ldr);
break;
case kAtomicStoreWord8:
case kWord32AtomicStoreWord8:
ASSEMBLE_ATOMIC_STORE_INTEGER(strb);
break;
case kAtomicStoreWord16:
case kWord32AtomicStoreWord16:
ASSEMBLE_ATOMIC_STORE_INTEGER(strh);
break;
case kAtomicStoreWord32:
case kWord32AtomicStoreWord32:
ASSEMBLE_ATOMIC_STORE_INTEGER(str);
break;
case kAtomicExchangeInt8:
case kWord32AtomicExchangeInt8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrexb, strexb);
__ sxtb(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicExchangeUint8:
case kWord32AtomicExchangeUint8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrexb, strexb);
break;
case kAtomicExchangeInt16:
case kWord32AtomicExchangeInt16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrexh, strexh);
__ sxth(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicExchangeUint16:
case kWord32AtomicExchangeUint16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrexh, strexh);
break;
case kAtomicExchangeWord32:
case kWord32AtomicExchangeWord32:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldrex, strex);
break;
case kAtomicCompareExchangeInt8:
case kWord32AtomicCompareExchangeInt8:
__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
__ uxtb(i.TempRegister(2), i.InputRegister(2));
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb,
i.TempRegister(2));
__ sxtb(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicCompareExchangeUint8:
case kWord32AtomicCompareExchangeUint8:
__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
__ uxtb(i.TempRegister(2), i.InputRegister(2));
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexb, strexb,
i.TempRegister(2));
break;
case kAtomicCompareExchangeInt16:
case kWord32AtomicCompareExchangeInt16:
__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
__ uxth(i.TempRegister(2), i.InputRegister(2));
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexh, strexh,
i.TempRegister(2));
__ sxth(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicCompareExchangeUint16:
case kWord32AtomicCompareExchangeUint16:
__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
__ uxth(i.TempRegister(2), i.InputRegister(2));
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrexh, strexh,
i.TempRegister(2));
break;
case kAtomicCompareExchangeWord32:
case kWord32AtomicCompareExchangeWord32:
__ add(i.TempRegister(1), i.InputRegister(0), i.InputRegister(1));
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldrex, strex,
i.InputRegister(2));
break;
#define ATOMIC_BINOP_CASE(op, inst) \
case kAtomic##op##Int8: \
case kWord32Atomic##op##Int8: \
ASSEMBLE_ATOMIC_BINOP(ldrexb, strexb, inst); \
__ sxtb(i.OutputRegister(0), i.OutputRegister(0)); \
break; \
case kAtomic##op##Uint8: \
case kWord32Atomic##op##Uint8: \
ASSEMBLE_ATOMIC_BINOP(ldrexb, strexb, inst); \
break; \
case kAtomic##op##Int16: \
case kWord32Atomic##op##Int16: \
ASSEMBLE_ATOMIC_BINOP(ldrexh, strexh, inst); \
__ sxth(i.OutputRegister(0), i.OutputRegister(0)); \
break; \
case kAtomic##op##Uint16: \
case kWord32Atomic##op##Uint16: \
ASSEMBLE_ATOMIC_BINOP(ldrexh, strexh, inst); \
break; \
case kAtomic##op##Word32: \
case kWord32Atomic##op##Word32: \
ASSEMBLE_ATOMIC_BINOP(ldrex, strex, inst); \
break;
ATOMIC_BINOP_CASE(Add, add)

53
src/compiler/arm/instruction-selector-arm.cc
View File

@ -2120,7 +2120,7 @@ void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
g.UseRegister(right));
}
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
ArmOperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2128,13 +2128,15 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
ArchOpcode opcode = kArchNop;
switch (load_rep.representation()) {
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
opcode =
load_rep.IsSigned() ? kWord32AtomicLoadInt8 : kWord32AtomicLoadUint8;
break;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
opcode = load_rep.IsSigned() ? kWord32AtomicLoadInt16
: kWord32AtomicLoadUint16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicLoadWord32;
opcode = kWord32AtomicLoadWord32;
break;
default:
UNREACHABLE();
@ -2144,7 +2146,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
ArmOperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2153,13 +2155,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicStoreWord8;
opcode = kWord32AtomicStoreWord8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicStoreWord16;
opcode = kWord32AtomicStoreWord16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicStoreWord32;
opcode = kWord32AtomicStoreWord32;
break;
default:
UNREACHABLE();
@ -2176,7 +2178,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
Emit(code, 0, nullptr, input_count, inputs);
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
ArmOperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2184,15 +2186,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2211,7 +2213,7 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
ArmOperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2220,15 +2222,15 @@ void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicCompareExchangeInt8;
opcode = kWord32AtomicCompareExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicCompareExchangeUint8;
opcode = kWord32AtomicCompareExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicCompareExchangeInt16;
opcode = kWord32AtomicCompareExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicCompareExchangeUint16;
opcode = kWord32AtomicCompareExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicCompareExchangeWord32;
opcode = kWord32AtomicCompareExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2287,11 +2289,12 @@ void InstructionSelector::VisitAtomicBinaryOperation(
Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);
}
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitAtomic##op(Node* node) { \
VisitAtomicBinaryOperation(node, kAtomic##op##Int8, kAtomic##op##Uint8, \
kAtomic##op##Int16, kAtomic##op##Uint16, \
kAtomic##op##Word32); \
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitWord32Atomic##op(Node* node) { \
VisitAtomicBinaryOperation( \
node, kWord32Atomic##op##Int8, kWord32Atomic##op##Uint8, \
kWord32Atomic##op##Int16, kWord32Atomic##op##Uint16, \
kWord32Atomic##op##Word32); \
}
VISIT_ATOMIC_BINOP(Add)
VISIT_ATOMIC_BINOP(Sub)

46
src/compiler/arm64/code-generator-arm64.cc
View File

@ -1561,82 +1561,82 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ Dsb(FullSystem, BarrierAll);
__ Isb();
break;
case kAtomicLoadInt8:
case kWord32AtomicLoadInt8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarb);
__ Sxtb(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicLoadUint8:
case kWord32AtomicLoadUint8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarb);
break;
case kAtomicLoadInt16:
case kWord32AtomicLoadInt16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarh);
__ Sxth(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicLoadUint16:
case kWord32AtomicLoadUint16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldarh);
break;
case kAtomicLoadWord32:
case kWord32AtomicLoadWord32:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Ldar);
break;
case kAtomicStoreWord8:
case kWord32AtomicStoreWord8:
ASSEMBLE_ATOMIC_STORE_INTEGER(Stlrb);
break;
case kAtomicStoreWord16:
case kWord32AtomicStoreWord16:
ASSEMBLE_ATOMIC_STORE_INTEGER(Stlrh);
break;
case kAtomicStoreWord32:
case kWord32AtomicStoreWord32:
ASSEMBLE_ATOMIC_STORE_INTEGER(Stlr);
break;
case kAtomicExchangeInt8:
case kWord32AtomicExchangeInt8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb);
__ Sxtb(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicExchangeUint8:
case kWord32AtomicExchangeUint8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrb, stlxrb);
break;
case kAtomicExchangeInt16:
case kWord32AtomicExchangeInt16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh);
__ Sxth(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicExchangeUint16:
case kWord32AtomicExchangeUint16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxrh, stlxrh);
break;
case kAtomicExchangeWord32:
case kWord32AtomicExchangeWord32:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(ldaxr, stlxr);
break;
case kAtomicCompareExchangeInt8:
case kWord32AtomicCompareExchangeInt8:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrb, stlxrb, UXTB);
__ Sxtb(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicCompareExchangeUint8:
case kWord32AtomicCompareExchangeUint8:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrb, stlxrb, UXTB);
break;
case kAtomicCompareExchangeInt16:
case kWord32AtomicCompareExchangeInt16:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrh, stlxrh, UXTH);
__ Sxth(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicCompareExchangeUint16:
case kWord32AtomicCompareExchangeUint16:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxrh, stlxrh, UXTH);
break;
case kAtomicCompareExchangeWord32:
case kWord32AtomicCompareExchangeWord32:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER(ldaxr, stlxr, UXTW);
break;
#define ATOMIC_BINOP_CASE(op, inst) \
case kAtomic##op##Int8: \
case kWord32Atomic##op##Int8: \
ASSEMBLE_ATOMIC_BINOP(ldaxrb, stlxrb, inst); \
__ Sxtb(i.OutputRegister(0), i.OutputRegister(0)); \
break; \
case kAtomic##op##Uint8: \
case kWord32Atomic##op##Uint8: \
ASSEMBLE_ATOMIC_BINOP(ldaxrb, stlxrb, inst); \
break; \
case kAtomic##op##Int16: \
case kWord32Atomic##op##Int16: \
ASSEMBLE_ATOMIC_BINOP(ldaxrh, stlxrh, inst); \
__ Sxth(i.OutputRegister(0), i.OutputRegister(0)); \
break; \
case kAtomic##op##Uint16: \
case kWord32Atomic##op##Uint16: \
ASSEMBLE_ATOMIC_BINOP(ldaxrh, stlxrh, inst); \
break; \
case kAtomic##op##Word32: \
case kWord32Atomic##op##Word32: \
ASSEMBLE_ATOMIC_BINOP(ldaxr, stlxr, inst); \
break;
ATOMIC_BINOP_CASE(Add, Add)

53
src/compiler/arm64/instruction-selector-arm64.cc
View File

@ -2600,7 +2600,7 @@ void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
g.UseRegister(left), g.UseRegister(right));
}
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
Arm64OperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2608,13 +2608,15 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
ArchOpcode opcode = kArchNop;
switch (load_rep.representation()) {
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
opcode =
load_rep.IsSigned() ? kWord32AtomicLoadInt8 : kWord32AtomicLoadUint8;
break;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
opcode = load_rep.IsSigned() ? kWord32AtomicLoadInt16
: kWord32AtomicLoadUint16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicLoadWord32;
opcode = kWord32AtomicLoadWord32;
break;
default:
UNREACHABLE();
@ -2628,7 +2630,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
arraysize(temps), temps);
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
Arm64OperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2637,13 +2639,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicStoreWord8;
opcode = kWord32AtomicStoreWord8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicStoreWord16;
opcode = kWord32AtomicStoreWord16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicStoreWord32;
opcode = kWord32AtomicStoreWord32;
break;
default:
UNREACHABLE();
@ -2661,7 +2663,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
Emit(code, 0, nullptr, input_count, inputs, arraysize(temps), temps);
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
Arm64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2669,15 +2671,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2696,7 +2698,7 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
Arm64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2705,15 +2707,15 @@ void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicCompareExchangeInt8;
opcode = kWord32AtomicCompareExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicCompareExchangeUint8;
opcode = kWord32AtomicCompareExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicCompareExchangeInt16;
opcode = kWord32AtomicCompareExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicCompareExchangeUint16;
opcode = kWord32AtomicCompareExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicCompareExchangeWord32;
opcode = kWord32AtomicCompareExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2771,11 +2773,12 @@ void InstructionSelector::VisitAtomicBinaryOperation(
Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);
}
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitAtomic##op(Node* node) { \
VisitAtomicBinaryOperation(node, kAtomic##op##Int8, kAtomic##op##Uint8, \
kAtomic##op##Int16, kAtomic##op##Uint16, \
kAtomic##op##Word32); \
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitWord32Atomic##op(Node* node) { \
VisitAtomicBinaryOperation( \
node, kWord32Atomic##op##Int8, kWord32Atomic##op##Uint8, \
kWord32Atomic##op##Int16, kWord32Atomic##op##Uint16, \
kWord32Atomic##op##Word32); \
}
VISIT_ATOMIC_BINOP(Add)
VISIT_ATOMIC_BINOP(Sub)

46
src/compiler/ia32/code-generator-ia32.cc
View File

@ -2950,81 +2950,81 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ cmp(esp, Operand::StaticVariable(stack_limit));
break;
}
case kAtomicExchangeInt8: {
case kWord32AtomicExchangeInt8: {
__ xchg_b(i.InputRegister(0), i.MemoryOperand(1));
__ movsx_b(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeUint8: {
case kWord32AtomicExchangeUint8: {
__ xchg_b(i.InputRegister(0), i.MemoryOperand(1));
__ movzx_b(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeInt16: {
case kWord32AtomicExchangeInt16: {
__ xchg_w(i.InputRegister(0), i.MemoryOperand(1));
__ movsx_w(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeUint16: {
case kWord32AtomicExchangeUint16: {
__ xchg_w(i.InputRegister(0), i.MemoryOperand(1));
__ movzx_w(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeWord32: {
case kWord32AtomicExchangeWord32: {
__ xchg(i.InputRegister(0), i.MemoryOperand(1));
break;
}
case kAtomicCompareExchangeInt8: {
case kWord32AtomicCompareExchangeInt8: {
__ lock();
__ cmpxchg_b(i.MemoryOperand(2), i.InputRegister(1));
__ movsx_b(eax, eax);
break;
}
case kAtomicCompareExchangeUint8: {
case kWord32AtomicCompareExchangeUint8: {
__ lock();
__ cmpxchg_b(i.MemoryOperand(2), i.InputRegister(1));
__ movzx_b(eax, eax);
break;
}
case kAtomicCompareExchangeInt16: {
case kWord32AtomicCompareExchangeInt16: {
__ lock();
__ cmpxchg_w(i.MemoryOperand(2), i.InputRegister(1));
__ movsx_w(eax, eax);
break;
}
case kAtomicCompareExchangeUint16: {
case kWord32AtomicCompareExchangeUint16: {
__ lock();
__ cmpxchg_w(i.MemoryOperand(2), i.InputRegister(1));
__ movzx_w(eax, eax);
break;
}
case kAtomicCompareExchangeWord32: {
case kWord32AtomicCompareExchangeWord32: {
__ lock();
__ cmpxchg(i.MemoryOperand(2), i.InputRegister(1));
break;
}
#define ATOMIC_BINOP_CASE(op, inst) \
case kAtomic##op##Int8: { \
case kWord32Atomic##op##Int8: { \
ASSEMBLE_ATOMIC_BINOP(inst, mov_b, cmpxchg_b); \
__ movsx_b(eax, eax); \
break; \
} \
case kAtomic##op##Uint8: { \
case kWord32Atomic##op##Uint8: { \
ASSEMBLE_ATOMIC_BINOP(inst, mov_b, cmpxchg_b); \
__ movzx_b(eax, eax); \
break; \
} \
case kAtomic##op##Int16: { \
case kWord32Atomic##op##Int16: { \
ASSEMBLE_ATOMIC_BINOP(inst, mov_w, cmpxchg_w); \
__ movsx_w(eax, eax); \
break; \
} \
case kAtomic##op##Uint16: { \
case kWord32Atomic##op##Uint16: { \
ASSEMBLE_ATOMIC_BINOP(inst, mov_w, cmpxchg_w); \
__ movzx_w(eax, eax); \
break; \
} \
case kAtomic##op##Word32: { \
case kWord32Atomic##op##Word32: { \
ASSEMBLE_ATOMIC_BINOP(inst, mov, cmpxchg); \
break; \
}
@ -3034,14 +3034,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ATOMIC_BINOP_CASE(Or, or_)
ATOMIC_BINOP_CASE(Xor, xor_)
#undef ATOMIC_BINOP_CASE
case kAtomicLoadInt8:
case kAtomicLoadUint8:
case kAtomicLoadInt16:
case kAtomicLoadUint16:
case kAtomicLoadWord32:
case kAtomicStoreWord8:
case kAtomicStoreWord16:
case kAtomicStoreWord32:
case kWord32AtomicLoadInt8:
case kWord32AtomicLoadUint8:
case kWord32AtomicLoadInt16:
case kWord32AtomicLoadUint16:
case kWord32AtomicLoadWord32:
case kWord32AtomicStoreWord8:
case kWord32AtomicStoreWord16:
case kWord32AtomicStoreWord32:
UNREACHABLE(); // Won't be generated by instruction selector.
break;
}

45
src/compiler/ia32/instruction-selector-ia32.cc
View File

@ -1564,7 +1564,7 @@ void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
g.UseRegister(node->InputAt(0)));
}
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
DCHECK(load_rep.representation() == MachineRepresentation::kWord8 ||
load_rep.representation() == MachineRepresentation::kWord16 ||
@ -1573,7 +1573,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
VisitLoad(node);
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
IA32OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -1583,13 +1583,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
break;
default:
UNREACHABLE();
@ -1615,7 +1615,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
Emit(code, 0, nullptr, input_count, inputs);
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
IA32OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -1624,15 +1624,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
MachineType type = AtomicOpRepresentationOf(node->op());
ArchOpcode opcode = kArchNop;
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -1664,7 +1664,7 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
IA32OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -1674,15 +1674,15 @@ void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
MachineType type = AtomicOpRepresentationOf(node->op());
ArchOpcode opcode = kArchNop;
if (type == MachineType::Int8()) {
opcode = kAtomicCompareExchangeInt8;
opcode = kWord32AtomicCompareExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicCompareExchangeUint8;
opcode = kWord32AtomicCompareExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicCompareExchangeInt16;
opcode = kWord32AtomicCompareExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicCompareExchangeUint16;
opcode = kWord32AtomicCompareExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicCompareExchangeWord32;
opcode = kWord32AtomicCompareExchangeWord32;
} else {
UNREACHABLE();
return;
@ -1758,11 +1758,12 @@ void InstructionSelector::VisitAtomicBinaryOperation(
Emit(code, 1, outputs, input_count, inputs, 1, temp);
}
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitAtomic##op(Node* node) { \
VisitAtomicBinaryOperation(node, kAtomic##op##Int8, kAtomic##op##Uint8, \
kAtomic##op##Int16, kAtomic##op##Uint16, \
kAtomic##op##Word32); \
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitWord32Atomic##op(Node* node) { \
VisitAtomicBinaryOperation( \
node, kWord32Atomic##op##Int8, kWord32Atomic##op##Uint8, \
kWord32Atomic##op##Int16, kWord32Atomic##op##Uint16, \
kWord32Atomic##op##Word32); \
}
VISIT_ATOMIC_BINOP(Add)
VISIT_ATOMIC_BINOP(Sub)

86
src/compiler/instruction-codes.h
View File

@ -69,49 +69,49 @@ enum class RecordWriteMode { kValueIsMap, kValueIsPointer, kValueIsAny };
V(ArchTruncateDoubleToI) \
V(ArchStoreWithWriteBarrier) \
V(ArchStackSlot) \
V(AtomicLoadInt8) \
V(AtomicLoadUint8) \
V(AtomicLoadInt16) \
V(AtomicLoadUint16) \
V(AtomicLoadWord32) \
V(AtomicStoreWord8) \
V(AtomicStoreWord16) \
V(AtomicStoreWord32) \
V(AtomicExchangeInt8) \
V(AtomicExchangeUint8) \
V(AtomicExchangeInt16) \
V(AtomicExchangeUint16) \
V(AtomicExchangeWord32) \
V(AtomicCompareExchangeInt8) \
V(AtomicCompareExchangeUint8) \
V(AtomicCompareExchangeInt16) \
V(AtomicCompareExchangeUint16) \
V(AtomicCompareExchangeWord32) \
V(AtomicAddInt8) \
V(AtomicAddUint8) \
V(AtomicAddInt16) \
V(AtomicAddUint16) \
V(AtomicAddWord32) \
V(AtomicSubInt8) \
V(AtomicSubUint8) \
V(AtomicSubInt16) \
V(AtomicSubUint16) \
V(AtomicSubWord32) \
V(AtomicAndInt8) \
V(AtomicAndUint8) \
V(AtomicAndInt16) \
V(AtomicAndUint16) \
V(AtomicAndWord32) \
V(AtomicOrInt8) \
V(AtomicOrUint8) \
V(AtomicOrInt16) \
V(AtomicOrUint16) \
V(AtomicOrWord32) \
V(AtomicXorInt8) \
V(AtomicXorUint8) \
V(AtomicXorInt16) \
V(AtomicXorUint16) \
V(AtomicXorWord32) \
V(Word32AtomicLoadInt8) \
V(Word32AtomicLoadUint8) \
V(Word32AtomicLoadInt16) \
V(Word32AtomicLoadUint16) \
V(Word32AtomicLoadWord32) \
V(Word32AtomicStoreWord8) \
V(Word32AtomicStoreWord16) \
V(Word32AtomicStoreWord32) \
V(Word32AtomicExchangeInt8) \
V(Word32AtomicExchangeUint8) \
V(Word32AtomicExchangeInt16) \
V(Word32AtomicExchangeUint16) \
V(Word32AtomicExchangeWord32) \
V(Word32AtomicCompareExchangeInt8) \
V(Word32AtomicCompareExchangeUint8) \
V(Word32AtomicCompareExchangeInt16) \
V(Word32AtomicCompareExchangeUint16) \
V(Word32AtomicCompareExchangeWord32) \
V(Word32AtomicAddInt8) \
V(Word32AtomicAddUint8) \
V(Word32AtomicAddInt16) \
V(Word32AtomicAddUint16) \
V(Word32AtomicAddWord32) \
V(Word32AtomicSubInt8) \
V(Word32AtomicSubUint8) \
V(Word32AtomicSubInt16) \
V(Word32AtomicSubUint16) \
V(Word32AtomicSubWord32) \
V(Word32AtomicAndInt8) \
V(Word32AtomicAndUint8) \
V(Word32AtomicAndInt16) \
V(Word32AtomicAndUint16) \
V(Word32AtomicAndWord32) \
V(Word32AtomicOrInt8) \
V(Word32AtomicOrUint8) \
V(Word32AtomicOrInt16) \
V(Word32AtomicOrUint16) \
V(Word32AtomicOrWord32) \
V(Word32AtomicXorInt8) \
V(Word32AtomicXorUint8) \
V(Word32AtomicXorInt16) \
V(Word32AtomicXorUint16) \
V(Word32AtomicXorWord32) \
V(Ieee754Float64Acos) \
V(Ieee754Float64Acosh) \
V(Ieee754Float64Asin) \

86
src/compiler/instruction-scheduler.cc
View File

@ -304,53 +304,53 @@ int InstructionScheduler::GetInstructionFlags(const Instruction* instr) const {
case kArchStoreWithWriteBarrier:
return kHasSideEffect;
case kAtomicLoadInt8:
case kAtomicLoadUint8:
case kAtomicLoadInt16:
case kAtomicLoadUint16:
case kAtomicLoadWord32:
case kWord32AtomicLoadInt8:
case kWord32AtomicLoadUint8:
case kWord32AtomicLoadInt16:
case kWord32AtomicLoadUint16:
case kWord32AtomicLoadWord32:
return kIsLoadOperation;
case kAtomicStoreWord8:
case kAtomicStoreWord16:
case kAtomicStoreWord32:
case kWord32AtomicStoreWord8:
case kWord32AtomicStoreWord16:
case kWord32AtomicStoreWord32:
return kHasSideEffect;
case kAtomicExchangeInt8:
case kAtomicExchangeUint8:
case kAtomicExchangeInt16:
case kAtomicExchangeUint16:
case kAtomicExchangeWord32:
case kAtomicCompareExchangeInt8:
case kAtomicCompareExchangeUint8:
case kAtomicCompareExchangeInt16:
case kAtomicCompareExchangeUint16:
case kAtomicCompareExchangeWord32:
case kAtomicAddInt8:
case kAtomicAddUint8:
case kAtomicAddInt16:
case kAtomicAddUint16:
case kAtomicAddWord32:
case kAtomicSubInt8:
case kAtomicSubUint8:
case kAtomicSubInt16:
case kAtomicSubUint16:
case kAtomicSubWord32:
case kAtomicAndInt8:
case kAtomicAndUint8:
case kAtomicAndInt16:
case kAtomicAndUint16:
case kAtomicAndWord32:
case kAtomicOrInt8:
case kAtomicOrUint8:
case kAtomicOrInt16:
case kAtomicOrUint16:
case kAtomicOrWord32:
case kAtomicXorInt8:
case kAtomicXorUint8:
case kAtomicXorInt16:
case kAtomicXorUint16:
case kAtomicXorWord32:
case kWord32AtomicExchangeInt8:
case kWord32AtomicExchangeUint8:
case kWord32AtomicExchangeInt16:
case kWord32AtomicExchangeUint16:
case kWord32AtomicExchangeWord32:
case kWord32AtomicCompareExchangeInt8:
case kWord32AtomicCompareExchangeUint8:
case kWord32AtomicCompareExchangeInt16:
case kWord32AtomicCompareExchangeUint16:
case kWord32AtomicCompareExchangeWord32:
case kWord32AtomicAddInt8:
case kWord32AtomicAddUint8:
case kWord32AtomicAddInt16:
case kWord32AtomicAddUint16:
case kWord32AtomicAddWord32:
case kWord32AtomicSubInt8:
case kWord32AtomicSubUint8:
case kWord32AtomicSubInt16:
case kWord32AtomicSubUint16:
case kWord32AtomicSubWord32:
case kWord32AtomicAndInt8:
case kWord32AtomicAndUint8:
case kWord32AtomicAndInt16:
case kWord32AtomicAndUint16:
case kWord32AtomicAndWord32:
case kWord32AtomicOrInt8:
case kWord32AtomicOrUint8:
case kWord32AtomicOrInt16:
case kWord32AtomicOrUint16:
case kWord32AtomicOrWord32:
case kWord32AtomicXorInt8:
case kWord32AtomicXorUint8:
case kWord32AtomicXorInt16:
case kWord32AtomicXorUint16:
case kWord32AtomicXorWord32:
return kHasSideEffect;
#define CASE(Name) case k##Name:

12
src/compiler/instruction-selector.cc
View File

@ -1539,18 +1539,18 @@ void InstructionSelector::VisitNode(Node* node) {
MarkAsWord32(node);
MarkPairProjectionsAsWord32(node);
return VisitWord32PairSar(node);
case IrOpcode::kAtomicLoad: {
case IrOpcode::kWord32AtomicLoad: {
LoadRepresentation type = LoadRepresentationOf(node->op());
MarkAsRepresentation(type.representation(), node);
return VisitAtomicLoad(node);
return VisitWord32AtomicLoad(node);
}
case IrOpcode::kAtomicStore:
return VisitAtomicStore(node);
case IrOpcode::kWord32AtomicStore:
return VisitWord32AtomicStore(node);
#define ATOMIC_CASE(name) \
case IrOpcode::kAtomic##name: { \
case IrOpcode::kWord32Atomic##name: { \
MachineType type = AtomicOpRepresentationOf(node->op()); \
MarkAsRepresentation(type.representation(), node); \
return VisitAtomic##name(node); \
return VisitWord32Atomic##name(node); \
}
ATOMIC_CASE(Exchange)
ATOMIC_CASE(CompareExchange)

36
src/compiler/machine-graph-verifier.cc
View File

@ -110,7 +110,7 @@ class MachineRepresentationInferrer {
case IrOpcode::kTypedStateValues:
representation_vector_[node->id()] = MachineRepresentation::kNone;
break;
case IrOpcode::kAtomicLoad:
case IrOpcode::kWord32AtomicLoad:
case IrOpcode::kLoad:
case IrOpcode::kProtectedLoad:
representation_vector_[node->id()] = PromoteRepresentation(
@ -143,17 +143,17 @@ class MachineRepresentationInferrer {
}
break;
}
case IrOpcode::kAtomicStore:
case IrOpcode::kWord32AtomicStore:
representation_vector_[node->id()] =
PromoteRepresentation(AtomicStoreRepresentationOf(node->op()));
break;
case IrOpcode::kAtomicExchange:
case IrOpcode::kAtomicCompareExchange:
case IrOpcode::kAtomicAdd:
case IrOpcode::kAtomicSub:
case IrOpcode::kAtomicAnd:
case IrOpcode::kAtomicOr:
case IrOpcode::kAtomicXor:
case IrOpcode::kWord32AtomicExchange:
case IrOpcode::kWord32AtomicCompareExchange:
case IrOpcode::kWord32AtomicAdd:
case IrOpcode::kWord32AtomicSub:
case IrOpcode::kWord32AtomicAnd:
case IrOpcode::kWord32AtomicOr:
case IrOpcode::kWord32AtomicXor:
representation_vector_[node->id()] = PromoteRepresentation(
AtomicOpRepresentationOf(node->op()).representation());
break;
@ -460,19 +460,19 @@ class MachineRepresentationChecker {
CheckValueInputIsTagged(node, 0);
break;
case IrOpcode::kLoad:
case IrOpcode::kAtomicLoad:
case IrOpcode::kWord32AtomicLoad:
CheckValueInputIsTaggedOrPointer(node, 0);
CheckValueInputRepresentationIs(
node, 1, MachineType::PointerRepresentation());
break;
case IrOpcode::kStore:
case IrOpcode::kAtomicStore:
case IrOpcode::kAtomicExchange:
case IrOpcode::kAtomicAdd:
case IrOpcode::kAtomicSub:
case IrOpcode::kAtomicAnd:
case IrOpcode::kAtomicOr:
case IrOpcode::kAtomicXor:
case IrOpcode::kWord32AtomicStore:
case IrOpcode::kWord32AtomicExchange:
case IrOpcode::kWord32AtomicAdd:
case IrOpcode::kWord32AtomicSub:
case IrOpcode::kWord32AtomicAnd:
case IrOpcode::kWord32AtomicOr:
case IrOpcode::kWord32AtomicXor:
CheckValueInputIsTaggedOrPointer(node, 0);
CheckValueInputRepresentationIs(
node, 1, MachineType::PointerRepresentation());
@ -487,7 +487,7 @@ class MachineRepresentationChecker {
node, 2, inferrer_->GetRepresentation(node));
}
break;
case IrOpcode::kAtomicCompareExchange:
case IrOpcode::kWord32AtomicCompareExchange:
CheckValueInputIsTaggedOrPointer(node, 0);
CheckValueInputRepresentationIs(
node, 1, MachineType::PointerRepresentation());

145
src/compiler/machine-operator.cc
View File

@ -37,7 +37,7 @@ std::ostream& operator<<(std::ostream& os, StoreRepresentation rep) {
LoadRepresentation LoadRepresentationOf(Operator const* op) {
DCHECK(IrOpcode::kLoad == op->opcode() ||
IrOpcode::kProtectedLoad == op->opcode() ||
IrOpcode::kAtomicLoad == op->opcode() ||
IrOpcode::kWord32AtomicLoad == op->opcode() ||
IrOpcode::kPoisonedLoad == op->opcode());
return OpParameter<LoadRepresentation>(op);
}
@ -82,7 +82,7 @@ StackSlotRepresentation const& StackSlotRepresentationOf(Operator const* op) {
}
MachineRepresentation AtomicStoreRepresentationOf(Operator const* op) {
DCHECK_EQ(IrOpcode::kAtomicStore, op->opcode());
DCHECK_EQ(IrOpcode::kWord32AtomicStore, op->opcode());
return OpParameter<MachineRepresentation>(op);
}
@ -563,28 +563,29 @@ struct MachineOperatorGlobalCache {
#undef STORE
#define ATOMIC_LOAD(Type) \
struct AtomicLoad##Type##Operator final \
struct Word32AtomicLoad##Type##Operator final \
: public Operator1<LoadRepresentation> { \
AtomicLoad##Type##Operator() \
Word32AtomicLoad##Type##Operator() \
: Operator1<LoadRepresentation>( \
IrOpcode::kAtomicLoad, \
IrOpcode::kWord32AtomicLoad, \
Operator::kNoDeopt | Operator::kNoThrow | Operator::kNoWrite, \
"AtomicLoad", 2, 1, 1, 1, 1, 0, MachineType::Type()) {} \
"Word32AtomicLoad", 2, 1, 1, 1, 1, 0, MachineType::Type()) {} \
}; \
AtomicLoad##Type##Operator kAtomicLoad##Type;
Word32AtomicLoad##Type##Operator kWord32AtomicLoad##Type;
ATOMIC_TYPE_LIST(ATOMIC_LOAD)
#undef ATOMIC_LOAD
#define ATOMIC_STORE(Type) \
struct AtomicStore##Type##Operator \
: public Operator1<MachineRepresentation> { \
AtomicStore##Type##Operator() \
: Operator1<MachineRepresentation>( \
IrOpcode::kAtomicStore, \
Operator::kNoDeopt | Operator::kNoRead | Operator::kNoThrow, \
"AtomicStore", 3, 1, 1, 0, 1, 0, MachineRepresentation::Type) {} \
}; \
AtomicStore##Type##Operator kAtomicStore##Type;
#define ATOMIC_STORE(Type) \
struct Word32AtomicStore##Type##Operator \
: public Operator1<MachineRepresentation> { \
Word32AtomicStore##Type##Operator() \
: Operator1<MachineRepresentation>( \
IrOpcode::kWord32AtomicStore, \
Operator::kNoDeopt | Operator::kNoRead | Operator::kNoThrow, \
"Word32AtomicStore", 3, 1, 1, 0, 1, 0, \
MachineRepresentation::Type) {} \
}; \
Word32AtomicStore##Type##Operator kWord32AtomicStore##Type;
ATOMIC_REPRESENTATION_LIST(ATOMIC_STORE)
#undef ATOMIC_STORE
@ -596,27 +597,28 @@ struct MachineOperatorGlobalCache {
3, 1, 1, 1, 1, 0, MachineType::type()) {} \
}; \
op##type##Operator k##op##type;
#define ATOMIC_OP_LIST(type) \
ATOMIC_OP(AtomicExchange, type) \
ATOMIC_OP(AtomicAdd, type) \
ATOMIC_OP(AtomicSub, type) \
ATOMIC_OP(AtomicAnd, type) \
ATOMIC_OP(AtomicOr, type) \
ATOMIC_OP(AtomicXor, type)
#define ATOMIC_OP_LIST(type) \
ATOMIC_OP(Word32AtomicExchange, type) \
ATOMIC_OP(Word32AtomicAdd, type) \
ATOMIC_OP(Word32AtomicSub, type) \
ATOMIC_OP(Word32AtomicAnd, type) \
ATOMIC_OP(Word32AtomicOr, type) \
ATOMIC_OP(Word32AtomicXor, type)
ATOMIC_TYPE_LIST(ATOMIC_OP_LIST)
#undef ATOMIC_OP_LIST
#undef ATOMIC_OP
#define ATOMIC_COMPARE_EXCHANGE(Type) \
struct AtomicCompareExchange##Type##Operator \
: public Operator1<MachineType> { \
AtomicCompareExchange##Type##Operator() \
: Operator1<MachineType>(IrOpcode::kAtomicCompareExchange, \
Operator::kNoDeopt | Operator::kNoThrow, \
"AtomicCompareExchange", 4, 1, 1, 1, 1, 0, \
MachineType::Type()) {} \
}; \
AtomicCompareExchange##Type##Operator kAtomicCompareExchange##Type;
#define ATOMIC_COMPARE_EXCHANGE(Type) \
struct Word32AtomicCompareExchange##Type##Operator \
: public Operator1<MachineType> { \
Word32AtomicCompareExchange##Type##Operator() \
: Operator1<MachineType>(IrOpcode::kWord32AtomicCompareExchange, \
Operator::kNoDeopt | Operator::kNoThrow, \
"Word32AtomicCompareExchange", 4, 1, 1, 1, 1, \
0, MachineType::Type()) {} \
}; \
Word32AtomicCompareExchange##Type##Operator \
kWord32AtomicCompareExchange##Type;
ATOMIC_TYPE_LIST(ATOMIC_COMPARE_EXCHANGE)
#undef ATOMIC_COMPARE_EXCHANGE
@ -849,90 +851,93 @@ const Operator* MachineOperatorBuilder::Comment(const char* msg) {
return new (zone_) CommentOperator(msg);
}
const Operator* MachineOperatorBuilder::AtomicLoad(LoadRepresentation rep) {
#define LOAD(Type) \
if (rep == MachineType::Type()) { \
return &cache_.kAtomicLoad##Type; \
const Operator* MachineOperatorBuilder::Word32AtomicLoad(
LoadRepresentation rep) {
#define LOAD(Type) \
if (rep == MachineType::Type()) { \
return &cache_.kWord32AtomicLoad##Type; \
}
ATOMIC_TYPE_LIST(LOAD)
#undef LOAD
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicStore(MachineRepresentation rep) {
#define STORE(kRep) \
if (rep == MachineRepresentation::kRep) { \
return &cache_.kAtomicStore##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicStore(
MachineRepresentation rep) {
#define STORE(kRep) \
if (rep == MachineRepresentation::kRep) { \
return &cache_.kWord32AtomicStore##kRep; \
}
ATOMIC_REPRESENTATION_LIST(STORE)
#undef STORE
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicExchange(MachineType rep) {
#define EXCHANGE(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kAtomicExchange##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicExchange(MachineType rep) {
#define EXCHANGE(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kWord32AtomicExchange##kRep; \
}
ATOMIC_TYPE_LIST(EXCHANGE)
#undef EXCHANGE
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicCompareExchange(MachineType rep) {
#define COMPARE_EXCHANGE(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kAtomicCompareExchange##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicCompareExchange(
MachineType rep) {
#define COMPARE_EXCHANGE(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kWord32AtomicCompareExchange##kRep; \
}
ATOMIC_TYPE_LIST(COMPARE_EXCHANGE)
#undef COMPARE_EXCHANGE
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicAdd(MachineType rep) {
#define ADD(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kAtomicAdd##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicAdd(MachineType rep) {
#define ADD(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kWord32AtomicAdd##kRep; \
}
ATOMIC_TYPE_LIST(ADD)
#undef ADD
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicSub(MachineType rep) {
#define SUB(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kAtomicSub##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicSub(MachineType rep) {
#define SUB(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kWord32AtomicSub##kRep; \
}
ATOMIC_TYPE_LIST(SUB)
#undef SUB
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicAnd(MachineType rep) {
#define AND(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kAtomicAnd##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicAnd(MachineType rep) {
#define AND(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kWord32AtomicAnd##kRep; \
}
ATOMIC_TYPE_LIST(AND)
#undef AND
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicOr(MachineType rep) {
#define OR(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kAtomicOr##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicOr(MachineType rep) {
#define OR(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kWord32AtomicOr##kRep; \
}
ATOMIC_TYPE_LIST(OR)
#undef OR
UNREACHABLE();
}
const Operator* MachineOperatorBuilder::AtomicXor(MachineType rep) {
#define XOR(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kAtomicXor##kRep; \
const Operator* MachineOperatorBuilder::Word32AtomicXor(MachineType rep) {
#define XOR(kRep) \
if (rep == MachineType::kRep()) { \
return &cache_.kWord32AtomicXor##kRep; \
}
ATOMIC_TYPE_LIST(XOR)
#undef XOR

18
src/compiler/machine-operator.h
View File

@ -610,23 +610,23 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
const Operator* LoadParentFramePointer();
// atomic-load [base + index]
const Operator* AtomicLoad(LoadRepresentation rep);
const Operator* Word32AtomicLoad(LoadRepresentation rep);
// atomic-store [base + index], value
const Operator* AtomicStore(MachineRepresentation rep);
const Operator* Word32AtomicStore(MachineRepresentation rep);
// atomic-exchange [base + index], value
const Operator* AtomicExchange(MachineType rep);
const Operator* Word32AtomicExchange(MachineType rep);
// atomic-compare-exchange [base + index], old_value, new_value
const Operator* AtomicCompareExchange(MachineType rep);
const Operator* Word32AtomicCompareExchange(MachineType rep);
// atomic-add [base + index], value
const Operator* AtomicAdd(MachineType rep);
const Operator* Word32AtomicAdd(MachineType rep);
// atomic-sub [base + index], value
const Operator* AtomicSub(MachineType rep);
const Operator* Word32AtomicSub(MachineType rep);
// atomic-and [base + index], value
const Operator* AtomicAnd(MachineType rep);
const Operator* Word32AtomicAnd(MachineType rep);
// atomic-or [base + index], value
const Operator* AtomicOr(MachineType rep);
const Operator* Word32AtomicOr(MachineType rep);
// atomic-xor [base + index], value
const Operator* AtomicXor(MachineType rep);
const Operator* Word32AtomicXor(MachineType rep);
const OptionalOperator SpeculationFence();

46
src/compiler/mips/code-generator-mips.cc
View File

@ -1648,74 +1648,74 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ ByteSwapSigned(i.OutputRegister(0), i.InputRegister(0), 4);
break;
}
case kAtomicLoadInt8:
case kWord32AtomicLoadInt8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lb);
break;
case kAtomicLoadUint8:
case kWord32AtomicLoadUint8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lbu);
break;
case kAtomicLoadInt16:
case kWord32AtomicLoadInt16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lh);
break;
case kAtomicLoadUint16:
case kWord32AtomicLoadUint16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lhu);
break;
case kAtomicLoadWord32:
case kWord32AtomicLoadWord32:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lw);
break;
case kAtomicStoreWord8:
case kWord32AtomicStoreWord8:
ASSEMBLE_ATOMIC_STORE_INTEGER(sb);
break;
case kAtomicStoreWord16:
case kWord32AtomicStoreWord16:
ASSEMBLE_ATOMIC_STORE_INTEGER(sh);
break;
case kAtomicStoreWord32:
case kWord32AtomicStoreWord32:
ASSEMBLE_ATOMIC_STORE_INTEGER(sw);
break;
case kAtomicExchangeInt8:
case kWord32AtomicExchangeInt8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(true, 8);
break;
case kAtomicExchangeUint8:
case kWord32AtomicExchangeUint8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(false, 8);
break;
case kAtomicExchangeInt16:
case kWord32AtomicExchangeInt16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(true, 16);
break;
case kAtomicExchangeUint16:
case kWord32AtomicExchangeUint16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(false, 16);
break;
case kAtomicExchangeWord32:
case kWord32AtomicExchangeWord32:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER();
break;
case kAtomicCompareExchangeInt8:
case kWord32AtomicCompareExchangeInt8:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(true, 8);
break;
case kAtomicCompareExchangeUint8:
case kWord32AtomicCompareExchangeUint8:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(false, 8);
break;
case kAtomicCompareExchangeInt16:
case kWord32AtomicCompareExchangeInt16:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(true, 16);
break;
case kAtomicCompareExchangeUint16:
case kWord32AtomicCompareExchangeUint16:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(false, 16);
break;
case kAtomicCompareExchangeWord32:
case kWord32AtomicCompareExchangeWord32:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER();
break;
#define ATOMIC_BINOP_CASE(op, inst) \
case kAtomic##op##Int8: \
case kWord32Atomic##op##Int8: \
ASSEMBLE_ATOMIC_BINOP_EXT(true, 8, inst); \
break; \
case kAtomic##op##Uint8: \
case kWord32Atomic##op##Uint8: \
ASSEMBLE_ATOMIC_BINOP_EXT(false, 8, inst); \
break; \
case kAtomic##op##Int16: \
case kWord32Atomic##op##Int16: \
ASSEMBLE_ATOMIC_BINOP_EXT(true, 16, inst); \
break; \
case kAtomic##op##Uint16: \
case kWord32Atomic##op##Uint16: \
ASSEMBLE_ATOMIC_BINOP_EXT(false, 16, inst); \
break; \
case kAtomic##op##Word32: \
case kWord32Atomic##op##Word32: \
ASSEMBLE_ATOMIC_BINOP(inst); \
break;
ATOMIC_BINOP_CASE(Add, Addu)

53
src/compiler/mips/instruction-selector-mips.cc
View File

@ -1748,7 +1748,7 @@ void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
arraysize(temps), temps);
}
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
MipsOperandGenerator g(this);
Node* base = node->InputAt(0);
@ -1756,13 +1756,15 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
ArchOpcode opcode = kArchNop;
switch (load_rep.representation()) {
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
opcode =
load_rep.IsSigned() ? kWord32AtomicLoadInt8 : kWord32AtomicLoadUint8;
break;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
opcode = load_rep.IsSigned() ? kWord32AtomicLoadInt16
: kWord32AtomicLoadUint16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicLoadWord32;
opcode = kWord32AtomicLoadWord32;
break;
default:
UNREACHABLE();
@ -1782,7 +1784,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
}
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
MipsOperandGenerator g(this);
Node* base = node->InputAt(0);
@ -1791,13 +1793,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicStoreWord8;
opcode = kWord32AtomicStoreWord8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicStoreWord16;
opcode = kWord32AtomicStoreWord16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicStoreWord32;
opcode = kWord32AtomicStoreWord32;
break;
default:
UNREACHABLE();
@ -1818,7 +1820,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
}
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
MipsOperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -1826,15 +1828,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -1856,7 +1858,7 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs, 3, temp);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
MipsOperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -1865,15 +1867,15 @@ void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicCompareExchangeInt8;
opcode = kWord32AtomicCompareExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicCompareExchangeUint8;
opcode = kWord32AtomicCompareExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicCompareExchangeInt16;
opcode = kWord32AtomicCompareExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicCompareExchangeUint16;
opcode = kWord32AtomicCompareExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicCompareExchangeWord32;
opcode = kWord32AtomicCompareExchangeWord32;
} else {
UNREACHABLE();
return;
@ -1937,11 +1939,12 @@ void InstructionSelector::VisitAtomicBinaryOperation(
Emit(code, 1, outputs, input_count, inputs, 4, temps);
}
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitAtomic##op(Node* node) { \
VisitAtomicBinaryOperation(node, kAtomic##op##Int8, kAtomic##op##Uint8, \
kAtomic##op##Int16, kAtomic##op##Uint16, \
kAtomic##op##Word32); \
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitWord32Atomic##op(Node* node) { \
VisitAtomicBinaryOperation( \
node, kWord32Atomic##op##Int8, kWord32Atomic##op##Uint8, \
kWord32Atomic##op##Int16, kWord32Atomic##op##Uint16, \
kWord32Atomic##op##Word32); \
}
VISIT_ATOMIC_BINOP(Add)
VISIT_ATOMIC_BINOP(Sub)

46
src/compiler/mips64/code-generator-mips64.cc
View File

@ -1857,75 +1857,75 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ dsrl32(i.OutputRegister(0), i.OutputRegister(0), 0);
break;
}
case kAtomicLoadInt8:
case kWord32AtomicLoadInt8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Lb);
break;
case kAtomicLoadUint8:
case kWord32AtomicLoadUint8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Lbu);
break;
case kAtomicLoadInt16:
case kWord32AtomicLoadInt16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Lh);
break;
case kAtomicLoadUint16:
case kWord32AtomicLoadUint16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Lhu);
break;
case kAtomicLoadWord32:
case kWord32AtomicLoadWord32:
ASSEMBLE_ATOMIC_LOAD_INTEGER(Lw);
break;
case kAtomicStoreWord8:
case kWord32AtomicStoreWord8:
ASSEMBLE_ATOMIC_STORE_INTEGER(Sb);
break;
case kAtomicStoreWord16:
case kWord32AtomicStoreWord16:
ASSEMBLE_ATOMIC_STORE_INTEGER(Sh);
break;
case kAtomicStoreWord32:
case kWord32AtomicStoreWord32:
ASSEMBLE_ATOMIC_STORE_INTEGER(Sw);
break;
case kAtomicExchangeInt8:
case kWord32AtomicExchangeInt8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(true, 8);
break;
case kAtomicExchangeUint8:
case kWord32AtomicExchangeUint8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(false, 8);
break;
case kAtomicExchangeInt16:
case kWord32AtomicExchangeInt16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(true, 16);
break;
case kAtomicExchangeUint16:
case kWord32AtomicExchangeUint16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER_EXT(false, 16);
break;
case kAtomicExchangeWord32:
case kWord32AtomicExchangeWord32:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER();
break;
case kAtomicCompareExchangeInt8:
case kWord32AtomicCompareExchangeInt8:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(true, 8);
break;
case kAtomicCompareExchangeUint8:
case kWord32AtomicCompareExchangeUint8:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(false, 8);
break;
case kAtomicCompareExchangeInt16:
case kWord32AtomicCompareExchangeInt16:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(true, 16);
break;
case kAtomicCompareExchangeUint16:
case kWord32AtomicCompareExchangeUint16:
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER_EXT(false, 16);
break;
case kAtomicCompareExchangeWord32:
case kWord32AtomicCompareExchangeWord32:
__ sll(i.InputRegister(2), i.InputRegister(2), 0);
ASSEMBLE_ATOMIC_COMPARE_EXCHANGE_INTEGER();
break;
#define ATOMIC_BINOP_CASE(op, inst) \
case kAtomic##op##Int8: \
case kWord32Atomic##op##Int8: \
ASSEMBLE_ATOMIC_BINOP_EXT(true, 8, inst); \
break; \
case kAtomic##op##Uint8: \
case kWord32Atomic##op##Uint8: \
ASSEMBLE_ATOMIC_BINOP_EXT(false, 8, inst); \
break; \
case kAtomic##op##Int16: \
case kWord32Atomic##op##Int16: \
ASSEMBLE_ATOMIC_BINOP_EXT(true, 16, inst); \
break; \
case kAtomic##op##Uint16: \
case kWord32Atomic##op##Uint16: \
ASSEMBLE_ATOMIC_BINOP_EXT(false, 16, inst); \
break; \
case kAtomic##op##Word32: \
case kWord32Atomic##op##Word32: \
ASSEMBLE_ATOMIC_BINOP(inst); \
break;
ATOMIC_BINOP_CASE(Add, Addu)

53
src/compiler/mips64/instruction-selector-mips64.cc
View File

@ -2413,7 +2413,7 @@ void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
g.UseRegister(left), g.UseRegister(right));
}
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
Mips64OperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2421,13 +2421,15 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
ArchOpcode opcode = kArchNop;
switch (load_rep.representation()) {
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
opcode =
load_rep.IsSigned() ? kWord32AtomicLoadInt8 : kWord32AtomicLoadUint8;
break;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
opcode = load_rep.IsSigned() ? kWord32AtomicLoadInt16
: kWord32AtomicLoadUint16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicLoadWord32;
opcode = kWord32AtomicLoadWord32;
break;
default:
UNREACHABLE();
@ -2446,7 +2448,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
}
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
Mips64OperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2455,13 +2457,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicStoreWord8;
opcode = kWord32AtomicStoreWord8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicStoreWord16;
opcode = kWord32AtomicStoreWord16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicStoreWord32;
opcode = kWord32AtomicStoreWord32;
break;
default:
UNREACHABLE();
@ -2482,7 +2484,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
}
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
Mips64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2490,15 +2492,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2520,7 +2522,7 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs, 3, temp);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
Mips64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2529,15 +2531,15 @@ void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicCompareExchangeInt8;
opcode = kWord32AtomicCompareExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicCompareExchangeUint8;
opcode = kWord32AtomicCompareExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicCompareExchangeInt16;
opcode = kWord32AtomicCompareExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicCompareExchangeUint16;
opcode = kWord32AtomicCompareExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicCompareExchangeWord32;
opcode = kWord32AtomicCompareExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2601,11 +2603,12 @@ void InstructionSelector::VisitAtomicBinaryOperation(
Emit(code, 1, outputs, input_count, inputs, 4, temps);
}
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitAtomic##op(Node* node) { \
VisitAtomicBinaryOperation(node, kAtomic##op##Int8, kAtomic##op##Uint8, \
kAtomic##op##Int16, kAtomic##op##Uint16, \
kAtomic##op##Word32); \
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitWord32Atomic##op(Node* node) { \
VisitAtomicBinaryOperation( \
node, kWord32Atomic##op##Int8, kWord32Atomic##op##Uint8, \
kWord32Atomic##op##Int16, kWord32Atomic##op##Uint16, \
kWord32Atomic##op##Word32); \
}
VISIT_ATOMIC_BINOP(Add)
VISIT_ATOMIC_BINOP(Sub)

178
src/compiler/opcodes.h
View File

@ -546,95 +546,95 @@
V(Float64Mod) \
V(Float64Pow)
#define MACHINE_OP_LIST(V) \
MACHINE_UNOP_32_LIST(V) \
MACHINE_BINOP_32_LIST(V) \
MACHINE_BINOP_64_LIST(V) \
MACHINE_COMPARE_BINOP_LIST(V) \
MACHINE_FLOAT32_BINOP_LIST(V) \
MACHINE_FLOAT32_UNOP_LIST(V) \
MACHINE_FLOAT64_BINOP_LIST(V) \
MACHINE_FLOAT64_UNOP_LIST(V) \
V(DebugAbort) \
V(DebugBreak) \
V(Comment) \
V(Load) \
V(PoisonedLoad) \
V(Store) \
V(StackSlot) \
V(Word32Popcnt) \
V(Word64Popcnt) \
V(Word64Clz) \
V(Word64Ctz) \
V(Word64ReverseBits) \
V(Word64ReverseBytes) \
V(Int64AbsWithOverflow) \
V(BitcastTaggedToWord) \
V(BitcastWordToTagged) \
V(BitcastWordToTaggedSigned) \
V(TruncateFloat64ToWord32) \
V(ChangeFloat32ToFloat64) \
V(ChangeFloat64ToInt32) \
V(ChangeFloat64ToUint32) \
V(ChangeFloat64ToUint64) \
V(Float64SilenceNaN) \
V(TruncateFloat64ToUint32) \
V(TruncateFloat32ToInt32) \
V(TruncateFloat32ToUint32) \
V(TryTruncateFloat32ToInt64) \
V(TryTruncateFloat64ToInt64) \
V(TryTruncateFloat32ToUint64) \
V(TryTruncateFloat64ToUint64) \
V(ChangeInt32ToFloat64) \
V(ChangeInt32ToInt64) \
V(ChangeUint32ToFloat64) \
V(ChangeUint32ToUint64) \
V(TruncateFloat64ToFloat32) \
V(TruncateInt64ToInt32) \
V(RoundFloat64ToInt32) \
V(RoundInt32ToFloat32) \
V(RoundInt64ToFloat32) \
V(RoundInt64ToFloat64) \
V(RoundUint32ToFloat32) \
V(RoundUint64ToFloat32) \
V(RoundUint64ToFloat64) \
V(BitcastFloat32ToInt32) \
V(BitcastFloat64ToInt64) \
V(BitcastInt32ToFloat32) \
V(BitcastInt64ToFloat64) \
V(Float64ExtractLowWord32) \
V(Float64ExtractHighWord32) \
V(Float64InsertLowWord32) \
V(Float64InsertHighWord32) \
V(SpeculationPoison) \
V(LoadStackPointer) \
V(LoadFramePointer) \
V(LoadParentFramePointer) \
V(UnalignedLoad) \
V(UnalignedStore) \
V(Int32PairAdd) \
V(Int32PairSub) \
V(Int32PairMul) \
V(Word32PairShl) \
V(Word32PairShr) \
V(Word32PairSar) \
V(ProtectedLoad) \
V(ProtectedStore) \
V(AtomicLoad) \
V(AtomicStore) \
V(AtomicExchange) \
V(AtomicCompareExchange) \
V(AtomicAdd) \
V(AtomicSub) \
V(AtomicAnd) \
V(AtomicOr) \
V(AtomicXor) \
V(SpeculationFence) \
V(SignExtendWord8ToInt32) \
V(SignExtendWord16ToInt32) \
V(SignExtendWord8ToInt64) \
V(SignExtendWord16ToInt64) \
V(SignExtendWord32ToInt64) \
#define MACHINE_OP_LIST(V) \
MACHINE_UNOP_32_LIST(V) \
MACHINE_BINOP_32_LIST(V) \
MACHINE_BINOP_64_LIST(V) \
MACHINE_COMPARE_BINOP_LIST(V) \
MACHINE_FLOAT32_BINOP_LIST(V) \
MACHINE_FLOAT32_UNOP_LIST(V) \
MACHINE_FLOAT64_BINOP_LIST(V) \
MACHINE_FLOAT64_UNOP_LIST(V) \
V(DebugAbort) \
V(DebugBreak) \
V(Comment) \
V(Load) \
V(PoisonedLoad) \
V(Store) \
V(StackSlot) \
V(Word32Popcnt) \
V(Word64Popcnt) \
V(Word64Clz) \
V(Word64Ctz) \
V(Word64ReverseBits) \
V(Word64ReverseBytes) \
V(Int64AbsWithOverflow) \
V(BitcastTaggedToWord) \
V(BitcastWordToTagged) \
V(BitcastWordToTaggedSigned) \
V(TruncateFloat64ToWord32) \
V(ChangeFloat32ToFloat64) \
V(ChangeFloat64ToInt32) \
V(ChangeFloat64ToUint32) \
V(ChangeFloat64ToUint64) \
V(Float64SilenceNaN) \
V(TruncateFloat64ToUint32) \
V(TruncateFloat32ToInt32) \
V(TruncateFloat32ToUint32) \
V(TryTruncateFloat32ToInt64) \
V(TryTruncateFloat64ToInt64) \
V(TryTruncateFloat32ToUint64) \
V(TryTruncateFloat64ToUint64) \
V(ChangeInt32ToFloat64) \
V(ChangeInt32ToInt64) \
V(ChangeUint32ToFloat64) \
V(ChangeUint32ToUint64) \
V(TruncateFloat64ToFloat32) \
V(TruncateInt64ToInt32) \
V(RoundFloat64ToInt32) \
V(RoundInt32ToFloat32) \
V(RoundInt64ToFloat32) \
V(RoundInt64ToFloat64) \
V(RoundUint32ToFloat32) \
V(RoundUint64ToFloat32) \
V(RoundUint64ToFloat64) \
V(BitcastFloat32ToInt32) \
V(BitcastFloat64ToInt64) \
V(BitcastInt32ToFloat32) \
V(BitcastInt64ToFloat64) \
V(Float64ExtractLowWord32) \
V(Float64ExtractHighWord32) \
V(Float64InsertLowWord32) \
V(Float64InsertHighWord32) \
V(SpeculationPoison) \
V(LoadStackPointer) \
V(LoadFramePointer) \
V(LoadParentFramePointer) \
V(UnalignedLoad) \
V(UnalignedStore) \
V(Int32PairAdd) \
V(Int32PairSub) \
V(Int32PairMul) \
V(Word32PairShl) \
V(Word32PairShr) \
V(Word32PairSar) \
V(ProtectedLoad) \
V(ProtectedStore) \
V(Word32AtomicLoad) \
V(Word32AtomicStore) \
V(Word32AtomicExchange) \
V(Word32AtomicCompareExchange) \
V(Word32AtomicAdd) \
V(Word32AtomicSub) \
V(Word32AtomicAnd) \
V(Word32AtomicOr) \
V(Word32AtomicXor) \
V(SpeculationFence) \
V(SignExtendWord8ToInt32) \
V(SignExtendWord16ToInt32) \
V(SignExtendWord8ToInt64) \
V(SignExtendWord16ToInt64) \
V(SignExtendWord32ToInt64) \
V(UnsafePointerAdd)
#define MACHINE_SIMD_OP_LIST(V) \

26
src/compiler/ppc/code-generator-ppc.cc
View File

@ -1905,47 +1905,47 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kPPC_StoreDouble:
ASSEMBLE_STORE_DOUBLE();
break;
case kAtomicLoadInt8:
case kWord32AtomicLoadInt8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lbz, lbzx);
__ extsb(i.OutputRegister(), i.OutputRegister());
break;
case kAtomicLoadUint8:
case kWord32AtomicLoadUint8:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lbz, lbzx);
break;
case kAtomicLoadInt16:
case kWord32AtomicLoadInt16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lha, lhax);
break;
case kAtomicLoadUint16:
case kWord32AtomicLoadUint16:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lhz, lhzx);
break;
case kAtomicLoadWord32:
case kWord32AtomicLoadWord32:
ASSEMBLE_ATOMIC_LOAD_INTEGER(lwz, lwzx);
break;
case kAtomicStoreWord8:
case kWord32AtomicStoreWord8:
ASSEMBLE_ATOMIC_STORE_INTEGER(stb, stbx);
break;
case kAtomicStoreWord16:
case kWord32AtomicStoreWord16:
ASSEMBLE_ATOMIC_STORE_INTEGER(sth, sthx);
break;
case kAtomicStoreWord32:
case kWord32AtomicStoreWord32:
ASSEMBLE_ATOMIC_STORE_INTEGER(stw, stwx);
break;
case kAtomicExchangeInt8:
case kWord32AtomicExchangeInt8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(lbarx, stbcx);
__ extsb(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicExchangeUint8:
case kWord32AtomicExchangeUint8:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(lbarx, stbcx);
break;
case kAtomicExchangeInt16:
case kWord32AtomicExchangeInt16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(lharx, sthcx);
__ extsh(i.OutputRegister(0), i.OutputRegister(0));
break;
case kAtomicExchangeUint16:
case kWord32AtomicExchangeUint16:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(lharx, sthcx);
break;
case kAtomicExchangeWord32:
case kWord32AtomicExchangeWord32:
ASSEMBLE_ATOMIC_EXCHANGE_INTEGER(lwarx, stwcx);
break;
default:

42
src/compiler/ppc/instruction-selector-ppc.cc
View File

@ -1935,7 +1935,7 @@ void InstructionSelector::VisitFloat64InsertHighWord32(Node* node) {
g.UseRegister(left), g.UseRegister(right));
}
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
PPCOperandGenerator g(this);
Node* base = node->InputAt(0);
@ -1943,13 +1943,15 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
ArchOpcode opcode = kArchNop;
switch (load_rep.representation()) {
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
opcode =
load_rep.IsSigned() ? kWord32AtomicLoadInt8 : kWord32AtomicLoadUint8;
break;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
opcode = load_rep.IsSigned() ? kWord32AtomicLoadInt16
: kWord32AtomicLoadUint16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicLoadWord32;
opcode = kWord32AtomicLoadWord32;
break;
default:
UNREACHABLE();
@ -1959,7 +1961,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
PPCOperandGenerator g(this);
Node* base = node->InputAt(0);
@ -1968,13 +1970,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicStoreWord8;
opcode = kWord32AtomicStoreWord8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicStoreWord16;
opcode = kWord32AtomicStoreWord16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicStoreWord32;
opcode = kWord32AtomicStoreWord32;
break;
default:
UNREACHABLE();
@ -1990,7 +1992,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
0, nullptr, input_count, inputs);
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
PPCOperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -1998,15 +2000,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2024,19 +2026,19 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitAtomicAdd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicAdd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicSub(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicSub(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicAnd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicAnd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicOr(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicOr(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicXor(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicXor(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) {
UNREACHABLE();

8
src/compiler/raw-machine-assembler.h
View File

@ -162,15 +162,15 @@ class V8_EXPORT_PRIVATE RawMachineAssembler {
// Atomic memory operations.
Node* AtomicLoad(MachineType type, Node* base, Node* index) {
return AddNode(machine()->AtomicLoad(type), base, index);
return AddNode(machine()->Word32AtomicLoad(type), base, index);
}
Node* AtomicStore(MachineRepresentation rep, Node* base, Node* index,
Node* value) {
return AddNode(machine()->AtomicStore(rep), base, index, value);
return AddNode(machine()->Word32AtomicStore(rep), base, index, value);
}
#define ATOMIC_FUNCTION(name) \
Node* Atomic##name(MachineType rep, Node* base, Node* index, Node* value) { \
return AddNode(machine()->Atomic##name(rep), base, index, value); \
return AddNode(machine()->Word32Atomic##name(rep), base, index, value); \
}
ATOMIC_FUNCTION(Exchange);
ATOMIC_FUNCTION(Add);
@ -182,7 +182,7 @@ class V8_EXPORT_PRIVATE RawMachineAssembler {
Node* AtomicCompareExchange(MachineType rep, Node* base, Node* index,
Node* old_value, Node* new_value) {
return AddNode(machine()->AtomicCompareExchange(rep), base, index,
return AddNode(machine()->Word32AtomicCompareExchange(rep), base, index,
old_value, new_value);
}

30
src/compiler/s390/code-generator-s390.cc
View File

@ -2260,28 +2260,28 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kS390_Lay:
__ lay(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadInt8:
case kWord32AtomicLoadInt8:
__ LoadB(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadUint8:
case kWord32AtomicLoadUint8:
__ LoadlB(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadInt16:
case kWord32AtomicLoadInt16:
__ LoadHalfWordP(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadUint16:
case kWord32AtomicLoadUint16:
__ LoadLogicalHalfWordP(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicLoadWord32:
case kWord32AtomicLoadWord32:
__ LoadlW(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicStoreWord8:
case kWord32AtomicStoreWord8:
__ StoreByte(i.InputRegister(0), i.MemoryOperand(nullptr, 1));
break;
case kAtomicStoreWord16:
case kWord32AtomicStoreWord16:
__ StoreHalfWord(i.InputRegister(0), i.MemoryOperand(nullptr, 1));
break;
case kAtomicStoreWord32:
case kWord32AtomicStoreWord32:
__ StoreW(i.InputRegister(0), i.MemoryOperand(nullptr, 1));
break;
// 0x aa bb cc dd
@ -2337,8 +2337,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ATOMIC_EXCHANGE(start, end, shift_amount, -idx * 2); \
}
#endif
case kAtomicExchangeInt8:
case kAtomicExchangeUint8: {
case kWord32AtomicExchangeInt8:
case kWord32AtomicExchangeUint8: {
Register base = i.InputRegister(0);
Register index = i.InputRegister(1);
Register value = i.InputRegister(2);
@ -2369,15 +2369,15 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ATOMIC_EXCHANGE_BYTE(3);
__ bind(&done);
if (opcode == kAtomicExchangeInt8) {
if (opcode == kWord32AtomicExchangeInt8) {
__ lbr(output, output);
} else {
__ llcr(output, output);
}
break;
}
case kAtomicExchangeInt16:
case kAtomicExchangeUint16: {
case kWord32AtomicExchangeInt16:
case kWord32AtomicExchangeUint16: {
Register base = i.InputRegister(0);
Register index = i.InputRegister(1);
Register value = i.InputRegister(2);
@ -2396,14 +2396,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ATOMIC_EXCHANGE_HALFWORD(1);
__ bind(&done);
if (opcode == kAtomicExchangeInt8) {
if (opcode == kWord32AtomicExchangeInt8) {
__ lhr(output, output);
} else {
__ llhr(output, output);
}
break;
}
case kAtomicExchangeWord32: {
case kWord32AtomicExchangeWord32: {
Register base = i.InputRegister(0);
Register index = i.InputRegister(1);
Register value = i.InputRegister(2);

40
src/compiler/s390/instruction-selector-s390.cc
View File

@ -2272,7 +2272,7 @@ bool InstructionSelector::IsTailCallAddressImmediate() { return false; }
int InstructionSelector::GetTempsCountForTailCallFromJSFunction() { return 3; }
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
S390OperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2280,13 +2280,13 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
ArchOpcode opcode = kArchNop;
switch (load_rep.representation()) {
case MachineRepresentation::kWord8:
opcode = load_rep.IsSigned() ? kAtomicLoadInt8 : kAtomicLoadUint8;
opcode = load_rep.IsSigned() ? kWord32AtomicLoadInt8 : kAtomicLoadUint8;
break;
case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kAtomicLoadInt16 : kAtomicLoadUint16;
opcode = load_rep.IsSigned() ? kWord32AtomicLoadInt16 : kAtomicLoadUint16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicLoadWord32;
opcode = kWord32AtomicLoadWord32;
break;
default:
UNREACHABLE();
@ -2296,7 +2296,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
S390OperandGenerator g(this);
Node* base = node->InputAt(0);
@ -2305,13 +2305,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicStoreWord8;
opcode = kWord32AtomicStoreWord8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicStoreWord16;
opcode = kWord32AtomicStoreWord16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicStoreWord32;
opcode = kWord32AtomicStoreWord32;
break;
default:
UNREACHABLE();
@ -2327,7 +2327,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
inputs);
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
S390OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2335,15 +2335,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
ArchOpcode opcode = kArchNop;
MachineType type = AtomicOpRepresentationOf(node->op());
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2361,19 +2361,19 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitAtomicAdd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicAdd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicSub(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicSub(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicAnd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicAnd(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicOr(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicOr(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitAtomicXor(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitWord32AtomicXor(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI32x4Splat(Node* node) { UNIMPLEMENTED(); }

18
src/compiler/verifier.cc
View File

@ -1679,15 +1679,15 @@ void Verifier::Visitor::Check(Node* node, const AllNodes& all) {
case IrOpcode::kLoadParentFramePointer:
case IrOpcode::kUnalignedLoad:
case IrOpcode::kUnalignedStore:
case IrOpcode::kAtomicLoad:
case IrOpcode::kAtomicStore:
case IrOpcode::kAtomicExchange:
case IrOpcode::kAtomicCompareExchange:
case IrOpcode::kAtomicAdd:
case IrOpcode::kAtomicSub:
case IrOpcode::kAtomicAnd:
case IrOpcode::kAtomicOr:
case IrOpcode::kAtomicXor:
case IrOpcode::kWord32AtomicLoad:
case IrOpcode::kWord32AtomicStore:
case IrOpcode::kWord32AtomicExchange:
case IrOpcode::kWord32AtomicCompareExchange:
case IrOpcode::kWord32AtomicAdd:
case IrOpcode::kWord32AtomicSub:
case IrOpcode::kWord32AtomicAnd:
case IrOpcode::kWord32AtomicOr:
case IrOpcode::kWord32AtomicXor:
case IrOpcode::kSpeculationFence:
case IrOpcode::kSignExtendWord8ToInt32:
case IrOpcode::kSignExtendWord16ToInt32:

40
src/compiler/wasm-compiler.cc
View File

@ -4583,15 +4583,15 @@ Node* WasmGraphBuilder::AtomicOp(wasm::WasmOpcode opcode, Node* const* inputs,
// TODO(gdeepti): Add alignment validation, traps on misalignment
Node* node;
switch (opcode) {
#define BUILD_ATOMIC_BINOP(Name, Operation, Type) \
case wasm::kExpr##Name: { \
Node* index = \
BoundsCheckMem(wasm::WasmOpcodes::MemSize(MachineType::Type()), \
inputs[0], offset, position, kNeedsBoundsCheck); \
node = graph()->NewNode( \
jsgraph()->machine()->Atomic##Operation(MachineType::Type()), \
MemBuffer(offset), index, inputs[1], *effect_, *control_); \
break; \
#define BUILD_ATOMIC_BINOP(Name, Operation, Type) \
case wasm::kExpr##Name: { \
Node* index = \
BoundsCheckMem(wasm::WasmOpcodes::MemSize(MachineType::Type()), \
inputs[0], offset, position, kNeedsBoundsCheck); \
node = graph()->NewNode( \
jsgraph()->machine()->Word32Atomic##Operation(MachineType::Type()), \
MemBuffer(offset), index, inputs[1], *effect_, *control_); \
break; \
}
ATOMIC_BINOP_LIST(BUILD_ATOMIC_BINOP)
#undef BUILD_ATOMIC_BINOP
@ -4602,7 +4602,7 @@ Node* WasmGraphBuilder::AtomicOp(wasm::WasmOpcode opcode, Node* const* inputs,
BoundsCheckMem(wasm::WasmOpcodes::MemSize(MachineType::Type()), \
inputs[0], offset, position, kNeedsBoundsCheck); \
node = graph()->NewNode( \
jsgraph()->machine()->Atomic##Operation(MachineType::Type()), \
jsgraph()->machine()->Word32Atomic##Operation(MachineType::Type()), \
MemBuffer(offset), index, inputs[1], inputs[2], *effect_, *control_); \
break; \
}
@ -4615,22 +4615,22 @@ Node* WasmGraphBuilder::AtomicOp(wasm::WasmOpcode opcode, Node* const* inputs,
BoundsCheckMem(wasm::WasmOpcodes::MemSize(MachineType::Type()), \
inputs[0], offset, position, kNeedsBoundsCheck); \
node = graph()->NewNode( \
jsgraph()->machine()->AtomicLoad(MachineType::Type()), \
jsgraph()->machine()->Word32AtomicLoad(MachineType::Type()), \
MemBuffer(offset), index, *effect_, *control_); \
break; \
}
ATOMIC_LOAD_LIST(BUILD_ATOMIC_LOAD_OP)
#undef BUILD_ATOMIC_LOAD_OP
#define BUILD_ATOMIC_STORE_OP(Name, Type, Rep) \
case wasm::kExpr##Name: { \
Node* index = \
BoundsCheckMem(wasm::WasmOpcodes::MemSize(MachineType::Type()), \
inputs[0], offset, position, kNeedsBoundsCheck); \
node = graph()->NewNode( \
jsgraph()->machine()->AtomicStore(MachineRepresentation::Rep), \
MemBuffer(offset), index, inputs[1], *effect_, *control_); \
break; \
#define BUILD_ATOMIC_STORE_OP(Name, Type, Rep) \
case wasm::kExpr##Name: { \
Node* index = \
BoundsCheckMem(wasm::WasmOpcodes::MemSize(MachineType::Type()), \
inputs[0], offset, position, kNeedsBoundsCheck); \
node = graph()->NewNode( \
jsgraph()->machine()->Word32AtomicStore(MachineRepresentation::Rep), \
MemBuffer(offset), index, inputs[1], *effect_, *control_); \
break; \
}
ATOMIC_STORE_LIST(BUILD_ATOMIC_STORE_OP)
#undef BUILD_ATOMIC_STORE_OP

46
src/compiler/x64/code-generator-x64.cc
View File

@ -2638,77 +2638,77 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kX64StackCheck:
__ CompareRoot(rsp, Heap::kStackLimitRootIndex);
break;
case kAtomicExchangeInt8: {
case kWord32AtomicExchangeInt8: {
__ xchgb(i.InputRegister(0), i.MemoryOperand(1));
__ movsxbl(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeUint8: {
case kWord32AtomicExchangeUint8: {
__ xchgb(i.InputRegister(0), i.MemoryOperand(1));
__ movzxbl(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeInt16: {
case kWord32AtomicExchangeInt16: {
__ xchgw(i.InputRegister(0), i.MemoryOperand(1));
__ movsxwl(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeUint16: {
case kWord32AtomicExchangeUint16: {
__ xchgw(i.InputRegister(0), i.MemoryOperand(1));
__ movzxwl(i.InputRegister(0), i.InputRegister(0));
break;
}
case kAtomicExchangeWord32: {
case kWord32AtomicExchangeWord32: {
__ xchgl(i.InputRegister(0), i.MemoryOperand(1));
break;
}
case kAtomicCompareExchangeInt8: {
case kWord32AtomicCompareExchangeInt8: {
__ lock();
__ cmpxchgb(i.MemoryOperand(2), i.InputRegister(1));
__ movsxbl(rax, rax);
break;
}
case kAtomicCompareExchangeUint8: {
case kWord32AtomicCompareExchangeUint8: {
__ lock();
__ cmpxchgb(i.MemoryOperand(2), i.InputRegister(1));
__ movzxbl(rax, rax);
break;
}
case kAtomicCompareExchangeInt16: {
case kWord32AtomicCompareExchangeInt16: {
__ lock();
__ cmpxchgw(i.MemoryOperand(2), i.InputRegister(1));
__ movsxwl(rax, rax);
break;
}
case kAtomicCompareExchangeUint16: {
case kWord32AtomicCompareExchangeUint16: {
__ lock();
__ cmpxchgw(i.MemoryOperand(2), i.InputRegister(1));
__ movzxwl(rax, rax);
break;
}
case kAtomicCompareExchangeWord32: {
case kWord32AtomicCompareExchangeWord32: {
__ lock();
__ cmpxchgl(i.MemoryOperand(2), i.InputRegister(1));
break;
}
#define ATOMIC_BINOP_CASE(op, inst) \
case kAtomic##op##Int8: \
case kWord32Atomic##op##Int8: \
ASSEMBLE_ATOMIC_BINOP(inst, movb, cmpxchgb); \
__ movsxbl(rax, rax); \
break; \
case kAtomic##op##Uint8: \
case kWord32Atomic##op##Uint8: \
ASSEMBLE_ATOMIC_BINOP(inst, movb, cmpxchgb); \
__ movzxbl(rax, rax); \
break; \
case kAtomic##op##Int16: \
case kWord32Atomic##op##Int16: \
ASSEMBLE_ATOMIC_BINOP(inst, movw, cmpxchgw); \
__ movsxwl(rax, rax); \
break; \
case kAtomic##op##Uint16: \
case kWord32Atomic##op##Uint16: \
ASSEMBLE_ATOMIC_BINOP(inst, movw, cmpxchgw); \
__ movzxwl(rax, rax); \
break; \
case kAtomic##op##Word32: \
case kWord32Atomic##op##Word32: \
ASSEMBLE_ATOMIC_BINOP(inst, movl, cmpxchgl); \
break;
ATOMIC_BINOP_CASE(Add, addl)
@ -2717,14 +2717,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ATOMIC_BINOP_CASE(Or, orl)
ATOMIC_BINOP_CASE(Xor, xorl)
#undef ATOMIC_BINOP_CASE
case kAtomicLoadInt8:
case kAtomicLoadUint8:
case kAtomicLoadInt16:
case kAtomicLoadUint16:
case kAtomicLoadWord32:
case kAtomicStoreWord8:
case kAtomicStoreWord16:
case kAtomicStoreWord32:
case kWord32AtomicLoadInt8:
case kWord32AtomicLoadUint8:
case kWord32AtomicLoadInt16:
case kWord32AtomicLoadUint16:
case kWord32AtomicLoadWord32:
case kWord32AtomicStoreWord8:
case kWord32AtomicStoreWord16:
case kWord32AtomicStoreWord32:
UNREACHABLE(); // Won't be generated by instruction selector.
break;
}

45
src/compiler/x64/instruction-selector-x64.cc
View File

@ -2152,7 +2152,7 @@ void InstructionSelector::VisitFloat64SilenceNaN(Node* node) {
g.UseRegister(node->InputAt(0)));
}
void InstructionSelector::VisitAtomicLoad(Node* node) {
void InstructionSelector::VisitWord32AtomicLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
DCHECK(load_rep.representation() == MachineRepresentation::kWord8 ||
load_rep.representation() == MachineRepresentation::kWord16 ||
@ -2161,7 +2161,7 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
VisitLoad(node);
}
void InstructionSelector::VisitAtomicStore(Node* node) {
void InstructionSelector::VisitWord32AtomicStore(Node* node) {
X64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2171,13 +2171,13 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
break;
default:
UNREACHABLE();
@ -2199,7 +2199,7 @@ void InstructionSelector::VisitAtomicStore(Node* node) {
Emit(code, 0, static_cast<InstructionOperand*>(nullptr), input_count, inputs);
}
void InstructionSelector::VisitAtomicExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicExchange(Node* node) {
X64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2208,15 +2208,15 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
MachineType type = AtomicOpRepresentationOf(node->op());
ArchOpcode opcode = kArchNop;
if (type == MachineType::Int8()) {
opcode = kAtomicExchangeInt8;
opcode = kWord32AtomicExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicExchangeUint8;
opcode = kWord32AtomicExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicExchangeInt16;
opcode = kWord32AtomicExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicExchangeUint16;
opcode = kWord32AtomicExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicExchangeWord32;
opcode = kWord32AtomicExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2239,7 +2239,7 @@ void InstructionSelector::VisitAtomicExchange(Node* node) {
Emit(code, 1, outputs, input_count, inputs);
}
void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
void InstructionSelector::VisitWord32AtomicCompareExchange(Node* node) {
X64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
@ -2249,15 +2249,15 @@ void InstructionSelector::VisitAtomicCompareExchange(Node* node) {
MachineType type = AtomicOpRepresentationOf(node->op());
ArchOpcode opcode = kArchNop;
if (type == MachineType::Int8()) {
opcode = kAtomicCompareExchangeInt8;
opcode = kWord32AtomicCompareExchangeInt8;
} else if (type == MachineType::Uint8()) {
opcode = kAtomicCompareExchangeUint8;
opcode = kWord32AtomicCompareExchangeUint8;
} else if (type == MachineType::Int16()) {
opcode = kAtomicCompareExchangeInt16;
opcode = kWord32AtomicCompareExchangeInt16;
} else if (type == MachineType::Uint16()) {
opcode = kAtomicCompareExchangeUint16;
opcode = kWord32AtomicCompareExchangeUint16;
} else if (type == MachineType::Int32() || type == MachineType::Uint32()) {
opcode = kAtomicCompareExchangeWord32;
opcode = kWord32AtomicCompareExchangeWord32;
} else {
UNREACHABLE();
return;
@ -2325,11 +2325,12 @@ void InstructionSelector::VisitAtomicBinaryOperation(
Emit(code, 1, outputs, input_count, inputs, 1, temp);
}
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitAtomic##op(Node* node) { \
VisitAtomicBinaryOperation(node, kAtomic##op##Int8, kAtomic##op##Uint8, \
kAtomic##op##Int16, kAtomic##op##Uint16, \
kAtomic##op##Word32); \
#define VISIT_ATOMIC_BINOP(op) \
void InstructionSelector::VisitWord32Atomic##op(Node* node) { \
VisitAtomicBinaryOperation( \
node, kWord32Atomic##op##Int8, kWord32Atomic##op##Uint8, \
kWord32Atomic##op##Int16, kWord32Atomic##op##Uint16, \
kWord32Atomic##op##Word32); \
}
VISIT_ATOMIC_BINOP(Add)
VISIT_ATOMIC_BINOP(Sub)