AuroraMiddleware/v8
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Lower waste from alignment of deferred code blocks.

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Some ARM chips load instructions 8 byte at a time.

Review URL: http://codereview.chromium.org/2809029

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4920 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
lrn@chromium.org 2010-06-23 07:03:34 +00:00
parent aade86e044
commit 41d9d375e3
2 changed files with 2 additions and 2 deletions
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3
src/arm/assembler-arm.cc
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@ -395,7 +395,8 @@ void Assembler::Align(int m) {
void Assembler::CodeTargetAlign() {
Align(16); // Tentative value.
// Preferred alignment of jump targets on some ARM chips.
Align(8);
}

1
src/codegen.cc
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@ -69,7 +69,6 @@ void CodeGenerator::ProcessDeferred() {
while (!deferred_.is_empty()) {
DeferredCode* code = deferred_.RemoveLast();
ASSERT(masm_ == code->masm());
masm_->CodeTargetAlign();
// Record position of deferred code stub.
masm_->RecordStatementPosition(code->statement_position());
if (code->position() != RelocInfo::kNoPosition) {