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PPC/s390: Cleanup some macros

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Port 247b33e921

R=gdeepti@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N

Change-Id: Iaedf6d6579e8224ba90b19b70ed040b23b85b2b0
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3868835
Reviewed-by: Thibaud Michaud <thibaudm@chromium.org>
Reviewed-by: Junliang Yan <junyan@redhat.com>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#82938}
This commit is contained in:
Milad Fa 2022-09-01 09:34:28 -04:00 committed by V8 LUCI CQ
parent c6efb4da12
commit 4360dea985
3 changed files with 44 additions and 0 deletions
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22
src/compiler/backend/ppc/instruction-selector-ppc.cc
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@ -2472,6 +2472,28 @@ SIMD_VISIT_QFMOP(F32x4Qfma)
SIMD_VISIT_QFMOP(F32x4Qfms)
#undef SIMD_VISIT_QFMOP
#define SIMD_RELAXED_OP_LIST(V) \
V(F64x2RelaxedMin, F64x2Pmin) \
V(F64x2RelaxedMax, F64x2Pmax) \
V(F32x4RelaxedMin, F32x4Pmin) \
V(F32x4RelaxedMax, F32x4Pmax) \
V(I32x4RelaxedTruncF32x4S, I32x4SConvertF32x4) \
V(I32x4RelaxedTruncF32x4U, I32x4UConvertF32x4) \
V(I32x4RelaxedTruncF64x2SZero, I32x4TruncSatF64x2SZero) \
V(I32x4RelaxedTruncF64x2UZero, I32x4TruncSatF64x2UZero) \
V(I16x8RelaxedQ15MulRS, I16x8Q15MulRSatS) \
V(I8x16RelaxedLaneSelect, S128Select) \
V(I16x8RelaxedLaneSelect, S128Select) \
V(I32x4RelaxedLaneSelect, S128Select) \
V(I64x2RelaxedLaneSelect, S128Select)
#define SIMD_VISIT_RELAXED_OP(name, op) \
void InstructionSelector::Visit##name(Node* node) { Visit##op(node); }
SIMD_RELAXED_OP_LIST(SIMD_VISIT_RELAXED_OP)
#undef SIMD_VISIT_RELAXED_OP
#undef SIMD_RELAXED_OP_LIST
#undef SIMD_TYPES
#if V8_ENABLE_WEBASSEMBLY
void InstructionSelector::VisitI8x16Shuffle(Node* node) {
uint8_t shuffle[kSimd128Size];

21
src/compiler/backend/s390/instruction-selector-s390.cc
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@ -2696,6 +2696,27 @@ SIMD_VISIT_QFMOP(F64x2Qfms)
SIMD_VISIT_QFMOP(F32x4Qfma)
SIMD_VISIT_QFMOP(F32x4Qfms)
#undef SIMD_VISIT_QFMOP
#define SIMD_RELAXED_OP_LIST(V) \
V(F64x2RelaxedMin, F64x2Pmin) \
V(F64x2RelaxedMax, F64x2Pmax) \
V(F32x4RelaxedMin, F32x4Pmin) \
V(F32x4RelaxedMax, F32x4Pmax) \
V(I32x4RelaxedTruncF32x4S, I32x4SConvertF32x4) \
V(I32x4RelaxedTruncF32x4U, I32x4UConvertF32x4) \
V(I32x4RelaxedTruncF64x2SZero, I32x4TruncSatF64x2SZero) \
V(I32x4RelaxedTruncF64x2UZero, I32x4TruncSatF64x2UZero) \
V(I16x8RelaxedQ15MulRS, I16x8Q15MulRSatS) \
V(I8x16RelaxedLaneSelect, S128Select) \
V(I16x8RelaxedLaneSelect, S128Select) \
V(I32x4RelaxedLaneSelect, S128Select) \
V(I64x2RelaxedLaneSelect, S128Select)
#define SIMD_VISIT_RELAXED_OP(name, op) \
void InstructionSelector::Visit##name(Node* node) { Visit##op(node); }
SIMD_RELAXED_OP_LIST(SIMD_VISIT_RELAXED_OP)
#undef SIMD_VISIT_RELAXED_OP
#undef SIMD_RELAXED_OP_LIST
#undef SIMD_TYPES
#if V8_ENABLE_WEBASSEMBLY

1
test/cctest/cctest.status
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@ -490,6 +490,7 @@
['arch == ppc64', {
# SIMD / Liftoff not fully implemented yet
'test-run-wasm-simd-liftoff/*': [SKIP],
'test-run-wasm-relaxed-simd/*': [SKIP],
'test-gc/RunWasmLiftoff_RefTrivialCasts': [SKIP],
'test-gc/RunWasmLiftoff_RefTrivialCastsStatic': [SKIP],
}],