PPC: optimize word and dw byte reverse on Power10
Change-Id: I89694796962d46b4fb1ae244ee39639576659465 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3092025 Reviewed-by: Junliang Yan <junyan@redhat.com> Commit-Queue: Milad Fa <mfarazma@redhat.com> Cr-Commit-Position: refs/heads/master@{#76273}
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@ -373,6 +373,11 @@ class Assembler : public AssemblerBase {
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x_form(instr_name, cr.code() * B2, src1.code(), src2.code(), LeaveRC); \
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}
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#define DECLARE_PPC_X_INSTRUCTIONS_G_FORM(name, instr_name, instr_value) \
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inline void name(const Register dst, const Register src) { \
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x_form(instr_name, src, dst, r0, LeaveRC); \
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}
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#define DECLARE_PPC_X_INSTRUCTIONS_EH_S_FORM(name, instr_name, instr_value) \
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inline void name(const Register dst, const MemOperand& src) { \
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x_form(instr_name, src.ra(), dst, src.rb(), SetEH); \
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@ -411,6 +416,7 @@ class Assembler : public AssemblerBase {
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PPC_X_OPCODE_D_FORM_LIST(DECLARE_PPC_X_INSTRUCTIONS_D_FORM)
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PPC_X_OPCODE_E_FORM_LIST(DECLARE_PPC_X_INSTRUCTIONS_E_FORM)
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PPC_X_OPCODE_F_FORM_LIST(DECLARE_PPC_X_INSTRUCTIONS_F_FORM)
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PPC_X_OPCODE_G_FORM_LIST(DECLARE_PPC_X_INSTRUCTIONS_G_FORM)
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PPC_X_OPCODE_EH_S_FORM_LIST(DECLARE_PPC_X_INSTRUCTIONS_EH_S_FORM)
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PPC_X_OPCODE_EH_L_FORM_LIST(DECLARE_PPC_X_INSTRUCTIONS_EH_L_FORM)
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@ -442,6 +448,7 @@ class Assembler : public AssemblerBase {
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#undef DECLARE_PPC_X_INSTRUCTIONS_D_FORM
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#undef DECLARE_PPC_X_INSTRUCTIONS_E_FORM
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#undef DECLARE_PPC_X_INSTRUCTIONS_F_FORM
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#undef DECLARE_PPC_X_INSTRUCTIONS_G_FORM
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#undef DECLARE_PPC_X_INSTRUCTIONS_EH_S_FORM
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#undef DECLARE_PPC_X_INSTRUCTIONS_EH_L_FORM
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@ -1270,6 +1270,14 @@ using Instr = uint32_t;
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/* Compare Logical */ \
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V(cmpl, CMPL, 0x7C000040)
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#define PPC_X_OPCODE_G_FORM_LIST(V) \
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/* Byte-Reverse Halfword */ \
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V(brh, BRH, 0x7C0001B6) \
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/* Byte-Reverse Word */ \
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V(brw, BRW, 0x7C000136) \
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/* Byte-Reverse Doubleword */ \
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V(brd, BRD, 0x7C000176)
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#define PPC_X_OPCODE_EH_S_FORM_LIST(V) \
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/* Store Byte Conditional Indexed */ \
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V(stbcx, STBCX, 0x7C00056D) \
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@ -1740,6 +1748,7 @@ using Instr = uint32_t;
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PPC_X_OPCODE_D_FORM_LIST(V) \
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PPC_X_OPCODE_E_FORM_LIST(V) \
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PPC_X_OPCODE_F_FORM_LIST(V) \
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PPC_X_OPCODE_G_FORM_LIST(V) \
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PPC_X_OPCODE_EH_L_FORM_LIST(V) \
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PPC_X_OPCODE_UNUSED_LIST(V)
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@ -2095,6 +2095,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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Register input = i.InputRegister(0);
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Register output = i.OutputRegister();
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Register temp1 = r0;
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if (CpuFeatures::IsSupported(PPC_10_PLUS)) {
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__ brw(output, input);
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break;
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}
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__ rotlwi(temp1, input, 8);
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__ rlwimi(temp1, input, 24, 0, 7);
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__ rlwimi(temp1, input, 24, 16, 23);
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@ -2115,6 +2119,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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Register temp1 = r0;
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Register temp2 = kScratchReg;
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Register temp3 = i.TempRegister(0);
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if (CpuFeatures::IsSupported(PPC_10_PLUS)) {
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__ brd(output, input);
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break;
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}
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__ rldicl(temp1, input, 32, 32);
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__ rotlwi(temp2, input, 8);
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__ rlwimi(temp2, input, 24, 0, 7);
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@ -917,6 +917,18 @@ void Decoder::DecodeExt2(Instruction* instr) {
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Format(instr, "cnttzd'. 'ra, 'rs");
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return;
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}
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case BRH: {
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Format(instr, "brh 'ra, 'rs");
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return;
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}
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case BRW: {
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Format(instr, "brw 'ra, 'rs");
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return;
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}
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case BRD: {
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Format(instr, "brd 'ra, 'rs");
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return;
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}
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case ANDX: {
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Format(instr, "and'. 'ra, 'rs, 'rb");
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return;
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@ -3282,7 +3282,25 @@ void Simulator::ExecuteGeneric(Instruction* instr) {
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}
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break;
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}
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case BRW: {
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constexpr int kBitsPerWord = 32;
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int rs = instr->RSValue();
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int ra = instr->RAValue();
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uint64_t rs_val = get_register(rs);
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uint32_t rs_high = rs_val >> kBitsPerWord;
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uint32_t rs_low = (rs_val << kBitsPerWord) >> kBitsPerWord;
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uint64_t result = __builtin_bswap32(rs_high);
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result = (result << kBitsPerWord) | __builtin_bswap32(rs_low);
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set_register(ra, result);
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break;
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}
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case BRD: {
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int rs = instr->RSValue();
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int ra = instr->RAValue();
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uint64_t rs_val = get_register(rs);
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set_register(ra, __builtin_bswap64(rs_val));
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break;
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}
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case FCFIDS: {
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// fcfids
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int frt = instr->RTValue();
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