MIPS: Tiny improvement of register constraints in LClassOfTest instructions.
Port r10379 (3399d6). Original commit message: The input register does not need to be made writable. We already allocate enough temp registers and the input register will always be preserved. BUG= TEST= Review URL: http://codereview.chromium.org/9254025 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@10437 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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@ -1862,9 +1862,8 @@ void LCodeGen::DoHasCachedArrayIndexAndBranch(
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}
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// Branches to a label or falls through with this instance class-name adr
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// Branches to a label or falls through with the answer in flags. Trashes
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// returned in temp reg, available for comparison by the caller. Trashes the
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// the temp registers, but not the input.
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// temp registers, but not the input. Only input and temp2 may alias.
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void LCodeGen::EmitClassOfTest(Label* is_true,
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void LCodeGen::EmitClassOfTest(Label* is_true,
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Label* is_false,
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Label* is_false,
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Handle<String>class_name,
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Handle<String>class_name,
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@ -1872,7 +1871,9 @@ void LCodeGen::EmitClassOfTest(Label* is_true,
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Register temp,
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Register temp,
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Register temp2) {
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Register temp2) {
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ASSERT(!input.is(temp));
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ASSERT(!input.is(temp));
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ASSERT(!temp.is(temp2)); // But input and temp2 may be the same register.
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ASSERT(!input.is(temp2));
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ASSERT(!temp.is(temp2));
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__ JumpIfSmi(input, is_false);
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__ JumpIfSmi(input, is_false);
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if (class_name->IsEqualTo(CStrVector("Function"))) {
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if (class_name->IsEqualTo(CStrVector("Function"))) {
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@ -1554,7 +1554,7 @@ LInstruction* LChunkBuilder::DoHasCachedArrayIndexAndBranch(
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LInstruction* LChunkBuilder::DoClassOfTestAndBranch(
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LInstruction* LChunkBuilder::DoClassOfTestAndBranch(
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HClassOfTestAndBranch* instr) {
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HClassOfTestAndBranch* instr) {
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ASSERT(instr->value()->representation().IsTagged());
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ASSERT(instr->value()->representation().IsTagged());
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return new LClassOfTestAndBranch(UseTempRegister(instr->value()),
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return new LClassOfTestAndBranch(UseRegister(instr->value()),
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TempRegister());
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TempRegister());
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}
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}
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