PPC: [was-simd] Fix Vector pack behaviour.

Due to the lane numbering difference between Intel and IBM machines,
we need to switch the input registers when doing a vector pack.

Change-Id: Id01d6292cb2a65b78dccdf3bab1d5ff010e1d018
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2569996
Reviewed-by: Junliang Yan <junyan@redhat.com>
Reviewed-by: Milad Fa <mfarazma@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#71575}
This commit is contained in:
Milad Fa 2020-12-02 14:15:13 -05:00 committed by Commit Bot
parent 073d0690d1
commit 4aeb4a34b3

View File

@ -3164,23 +3164,23 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break;
}
case kPPC_I16x8SConvertI32x4: {
__ vpkswss(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1));
__ vpkswss(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kPPC_I16x8UConvertI32x4: {
__ vpkswus(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1));
__ vpkswus(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kPPC_I8x16SConvertI16x8: {
__ vpkshss(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1));
__ vpkshss(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kPPC_I8x16UConvertI16x8: {
__ vpkshus(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1));
__ vpkshus(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kPPC_I8x16Shuffle: {