[liftoff][arm] Make context register allocatable
This will make it easier to generate builtin calls that require the context to be passed in that register, because this can be represented as a {LiftoffRegister} then. R=thibaudm@chromium.org Bug: v8:11453 Change-Id: I00995203cc936f23d1c01fdbf8f13eb929f228ae Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2752151 Reviewed-by: Thibaud Michaud <thibaudm@chromium.org> Reviewed-by: Jakob Kummerow <jkummerow@chromium.org> Commit-Queue: Clemens Backes <clemensb@chromium.org> Cr-Commit-Position: refs/heads/master@{#73345}
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@ -76,8 +76,8 @@ class WasmCompileLazyFrameConstants : public TypedFrameConstants {
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// registers (see liftoff-assembler-defs.h).
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class WasmDebugBreakFrameConstants : public TypedFrameConstants {
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public:
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// {r0, r1, r2, r3, r4, r5, r6, r8, r9}
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static constexpr uint32_t kPushedGpRegs = 0b1101111111;
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// {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9}
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static constexpr uint32_t kPushedGpRegs = 0b1111111111;
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// {d0 .. d12}
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static constexpr int kFirstPushedFpReg = 0;
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static constexpr int kLastPushedFpReg = 12;
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@ -48,9 +48,9 @@ constexpr RegList kLiftoffAssemblerFpCacheRegs = DoubleRegister::ListOf(
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#elif V8_TARGET_ARCH_ARM
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// r7: cp, r10: root, r11: fp, r12: ip, r13: sp, r14: lr, r15: pc.
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// r10: root, r11: fp, r12: ip, r13: sp, r14: lr, r15: pc.
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constexpr RegList kLiftoffAssemblerGpCacheRegs =
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Register::ListOf(r0, r1, r2, r3, r4, r5, r6, r8, r9);
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Register::ListOf(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9);
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// d13: zero, d14-d15: scratch
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constexpr RegList kLiftoffAssemblerFpCacheRegs = LowDwVfpRegister::ListOf(
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