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[wasm][arm64] Fix 16-bit to 32-bit sign extension

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This is identical to https://crrev.com/c/3094011, but for 16-bit values.
We introduce another instruction to differentiate between 16->32 bit
sign extensions and 16->64 bit sign extensions.

R=ahaas@chromium.org, mslekova@chromium.org

Bug: chromium:1239116
Change-Id: I2742e9d9c2b4a038fc7a0b1715faf8f25fa20b1f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3094012
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Maya Lekova <mslekova@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Cr-Commit-Position: refs/heads/master@{#76284}
This commit is contained in:
Clemens Backes 2021-08-13 17:11:11 +02:00 committed by V8 LUCI CQ
parent 748ae7cbf4
commit 4d0730084d
5 changed files with 12 additions and 2 deletions
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4
src/compiler/backend/arm64/code-generator-arm64.cc
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@ -1779,6 +1779,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ Ldrsh(i.OutputRegister(), i.MemoryOperand()); __ Ldrsh(i.OutputRegister(), i.MemoryOperand());
break; break;
case kArm64LdrshW:
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ Ldrsh(i.OutputRegister32(), i.MemoryOperand());
break;
case kArm64Strh: case kArm64Strh:
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ Strh(i.InputOrZeroRegister64(0), i.MemoryOperand(1)); __ Strh(i.InputOrZeroRegister64(0), i.MemoryOperand(1));

1
src/compiler/backend/arm64/instruction-codes-arm64.h
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@ -168,6 +168,7 @@ namespace compiler {
V(Arm64Strb) \ V(Arm64Strb) \
V(Arm64Ldrh) \ V(Arm64Ldrh) \
V(Arm64Ldrsh) \ V(Arm64Ldrsh) \
V(Arm64LdrshW) \
V(Arm64Strh) \ V(Arm64Strh) \
V(Arm64Ldrsw) \ V(Arm64Ldrsw) \
V(Arm64LdrW) \ V(Arm64LdrW) \

1
src/compiler/backend/arm64/instruction-scheduler-arm64.cc
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@ -368,6 +368,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kArm64LdrsbW: case kArm64LdrsbW:
case kArm64Ldrh: case kArm64Ldrh:
case kArm64Ldrsh: case kArm64Ldrsh:
case kArm64LdrshW:
case kArm64Ldrsw: case kArm64Ldrsw:
case kArm64LdrW: case kArm64LdrW:
case kArm64Ldr: case kArm64Ldr:

6
src/compiler/backend/arm64/instruction-selector-arm64.cc
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@ -795,7 +795,11 @@ void InstructionSelector::VisitLoad(Node* node) {
immediate_mode = kLoadStoreImm8; immediate_mode = kLoadStoreImm8;
break; break;
case MachineRepresentation::kWord16: case MachineRepresentation::kWord16:
opcode = load_rep.IsSigned() ? kArm64Ldrsh : kArm64Ldrh; opcode = load_rep.IsUnsigned()
? kArm64Ldrh
: load_rep.semantic() == MachineSemantic::kInt32
? kArm64LdrshW
: kArm64Ldrsh;
immediate_mode = kLoadStoreImm16; immediate_mode = kLoadStoreImm16;
break; break;
case MachineRepresentation::kWord32: case MachineRepresentation::kWord32:

2
test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc
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@ -3015,7 +3015,7 @@ static const MemoryAccess kMemoryAccesses[] = {
{-256, -255, -3, -2, -1, 0, 1, 2, 3, 255, {-256, -255, -3, -2, -1, 0, 1, 2, 3, 255,
256, 257, 258, 1000, 1001, 2121, 2442, 4093, 4094, 4095}}, 256, 257, 258, 1000, 1001, 2121, 2442, 4093, 4094, 4095}},
{MachineType::Int16(), {MachineType::Int16(),
kArm64Ldrsh, kArm64LdrshW,
kArm64Strh, kArm64Strh,
{-256, -255, -3, -2, -1, 0, 1, 2, 3, 255, {-256, -255, -3, -2, -1, 0, 1, 2, 3, 255,
256, 258, 260, 4096, 4098, 4100, 4242, 6786, 8188, 8190}}, 256, 258, 260, 4096, 4098, 4100, 4242, 6786, 8188, 8190}},