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[turbofan][64] Remove Smi Untagging extra nodes for 31 bit smis

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There are some cases where we can ignore some truncations or
change nodes for Smi Untagging, when we are using 31 bit smis
in 64 bit architectures.

Updated DecompressionOptimizer to match the new pattern.

Change-Id: I89d34407e6f780ec0399cd427cf9d3e24ee5669a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1889877
Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org>
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64909}
This commit is contained in:
Santiago Aboy Solanes 2019-11-12 11:25:06 +00:00 committed by Commit Bot
parent 52baf4c464
commit 4d1b7af7b1
3 changed files with 5 additions and 8 deletions
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1
src/compiler/decompression-optimizer.cc
View File

@ -80,6 +80,7 @@ void DecompressionOptimizer::MarkNodeInputs(Node* node) {
case IrOpcode::kUint32LessThanOrEqual:
case IrOpcode::kWord32And:
case IrOpcode::kWord32Equal:
case IrOpcode::kWord32Shl:
DCHECK_EQ(node->op()->ValueInputCount(), 2);
MaybeMarkAndQueueForRevisit(node->InputAt(0),
State::kOnly32BitsObserved); // value_0

7
src/compiler/effect-control-linearizer.cc
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@ -4369,8 +4369,7 @@ Node* EffectControlLinearizer::AllocateHeapNumberWithValue(Node* value) {
Node* EffectControlLinearizer::ChangeIntPtrToSmi(Node* value) {
// Do shift on 32bit values if Smis are stored in the lower word.
if (machine()->Is64() && SmiValuesAre31Bits()) {
return __ ChangeInt32ToInt64(
__ Word32Shl(__ TruncateInt64ToInt32(value), SmiShiftBitsConstant()));
return __ Word32Shl(value, SmiShiftBitsConstant());
}
return __ WordShl(value, SmiShiftBitsConstant());
}
@ -4392,7 +4391,7 @@ Node* EffectControlLinearizer::ChangeIntPtrToInt32(Node* value) {
Node* EffectControlLinearizer::ChangeInt32ToSmi(Node* value) {
// Do shift on 32bit values if Smis are stored in the lower word.
if (machine()->Is64() && SmiValuesAre31Bits()) {
return __ ChangeInt32ToInt64(__ Word32Shl(value, SmiShiftBitsConstant()));
return __ Word32Shl(value, SmiShiftBitsConstant());
}
return ChangeIntPtrToSmi(ChangeInt32ToIntPtr(value));
}
@ -4412,7 +4411,7 @@ Node* EffectControlLinearizer::ChangeUint32ToUintPtr(Node* value) {
Node* EffectControlLinearizer::ChangeUint32ToSmi(Node* value) {
// Do shift on 32bit values if Smis are stored in the lower word.
if (machine()->Is64() && SmiValuesAre31Bits()) {
return __ ChangeUint32ToUint64(__ Word32Shl(value, SmiShiftBitsConstant()));
return __ Word32Shl(value, SmiShiftBitsConstant());
} else {
return __ WordShl(ChangeUint32ToUintPtr(value), SmiShiftBitsConstant());
}

5
test/unittests/compiler/decompression-optimizer-unittest.cc
View File

@ -195,13 +195,10 @@ TEST_F(DecompressionOptimizerTest, Word32ShlSmiTag) {
// Create the graph.
Node* load = graph()->NewNode(machine()->Load(MachineType::AnyTagged()),
object, index, effect, control);
Node* truncation = graph()->NewNode(machine()->TruncateInt64ToInt32(), load);
Node* smi_shift_bits =
graph()->NewNode(common()->Int32Constant(kSmiShiftSize + kSmiTagSize));
Node* word32_shl =
graph()->NewNode(machine()->Word32Shl(), truncation, smi_shift_bits);
graph()->SetEnd(
graph()->NewNode(machine()->ChangeInt32ToInt64(), word32_shl));
graph()->NewNode(machine()->Word32Shl(), load, smi_shift_bits));
// Change the nodes, and test the change.
Reduce();
EXPECT_EQ(LoadMachRep(load), CompressedMachRep(MachineType::AnyTagged()));