[test] make instruction sequence test emit cfgs more like the scheduler
BUG= Review URL: https://codereview.chromium.org/1116923002 Cr-Commit-Position: refs/heads/master@{#28167}
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@ -109,7 +109,7 @@ Instruction* InstructionSequenceTest::EndBlock(BlockCompletion completion) {
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case kBlockEnd:
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break;
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case kFallThrough:
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result = EmitFallThrough();
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result = EmitJump();
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break;
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case kJump:
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CHECK(!block_returns_);
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@ -441,11 +441,20 @@ InstructionBlock* InstructionSequenceTest::NewBlock() {
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void InstructionSequenceTest::WireBlocks() {
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CHECK(!current_block());
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CHECK(instruction_blocks_.size() == completions_.size());
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CHECK(loop_blocks_.empty());
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// Wire in end block to look like a scheduler produced cfg.
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auto end_block = NewBlock();
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current_block_ = nullptr;
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sequence()->EndBlock(end_block->rpo_number());
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size_t offset = 0;
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for (const auto& completion : completions_) {
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switch (completion.type_) {
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case kBlockEnd:
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case kBlockEnd: {
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auto block = instruction_blocks_[offset];
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block->successors().push_back(end_block->rpo_number());
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end_block->predecessors().push_back(block->rpo_number());
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break;
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}
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case kFallThrough: // Fallthrough.
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case kJump:
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WireBlock(offset, completion.offset_0_);
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@ -136,9 +136,11 @@ TEST_F(MoveOptimizerTest, SimpleMerge) {
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StartBlock();
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EndBlock(Last());
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auto last = LastInstruction();
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Optimize();
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auto move = LastInstruction()->parallel_moves()[0];
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auto move = last->parallel_moves()[0];
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CHECK_EQ(1, NonRedundantSize(move));
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CHECK(Contains(move, Reg(0), Reg(1)));
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}
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@ -163,11 +165,13 @@ TEST_F(MoveOptimizerTest, SimpleMergeCycle) {
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StartBlock();
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EndBlock(Last());
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auto last = LastInstruction();
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Optimize();
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CHECK(gap_0->AreMovesRedundant());
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CHECK(gap_1->AreMovesRedundant());
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auto move = LastInstruction()->parallel_moves()[0];
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auto move = last->parallel_moves()[0];
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CHECK_EQ(2, NonRedundantSize(move));
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CHECK(Contains(move, Reg(0), Reg(1)));
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CHECK(Contains(move, Reg(1), Reg(0)));
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