S390: Enable unaligned accesses and character preloading in regexp.
R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com, bjaideep@ca.ibm.com BUG= Review-Url: https://codereview.chromium.org/2072863003 Cr-Commit-Position: refs/heads/master@{#38306}
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@ -1232,17 +1232,52 @@ bool RegExpMacroAssemblerS390::CanReadUnaligned() {
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void RegExpMacroAssemblerS390::LoadCurrentCharacterUnchecked(int cp_offset,
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int characters) {
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DCHECK(characters == 1);
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DCHECK(characters == 1 || CanReadUnaligned());
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if (mode_ == LATIN1) {
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__ LoadlB(current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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// using load reverse for big-endian platforms
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if (characters == 4) {
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#if V8_TARGET_LITTLE_ENDIAN
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__ LoadlW(current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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#else
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__ LoadLogicalReversedWordP(current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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#endif
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} else if (characters == 2) {
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#if V8_TARGET_LITTLE_ENDIAN
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__ LoadLogicalHalfWordP(current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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#else
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__ LoadLogicalReversedHalfWordP(current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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#endif
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} else {
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DCHECK(characters == 1);
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__ LoadlB(current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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}
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} else {
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DCHECK(mode_ == UC16);
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__ LoadLogicalHalfWordP(
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current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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if (characters == 2) {
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__ LoadlW(current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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#if !V8_TARGET_LITTLE_ENDIAN
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// need to swap the order of the characters for big-endian platforms
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__ rll(current_character(), current_character(), Operand(16));
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#endif
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} else {
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DCHECK(characters == 1);
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__ LoadLogicalHalfWordP(
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current_character(),
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MemOperand(current_input_offset(), end_of_input_address(),
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cp_offset * char_size()));
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}
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}
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}
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@ -173,6 +173,7 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {
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USE(performSTFLE); // To avoid assert
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#endif
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supported_ |= (1u << FPU);
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supported_ |= (1u << UNALIGNED_ACCESSES);
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}
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void CpuFeatures::PrintTarget() {
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@ -5078,6 +5078,22 @@ void MacroAssembler::LoadlW(Register dst, const MemOperand& mem,
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#endif
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}
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void MacroAssembler::LoadLogicalHalfWordP(Register dst, const MemOperand& mem) {
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#if V8_TARGET_ARCH_S390X
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llgh(dst, mem);
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#else
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llh(dst, mem);
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#endif
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}
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void MacroAssembler::LoadLogicalHalfWordP(Register dst, Register src) {
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#if V8_TARGET_ARCH_S390X
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llghr(dst, src);
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#else
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llhr(dst, src);
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#endif
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}
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void MacroAssembler::LoadB(Register dst, const MemOperand& mem) {
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#if V8_TARGET_ARCH_S390X
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lgb(dst, mem);
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@ -5102,6 +5118,20 @@ void MacroAssembler::LoadlB(Register dst, const MemOperand& mem) {
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#endif
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}
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void MacroAssembler::LoadLogicalReversedWordP(Register dst,
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const MemOperand& mem) {
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lrv(dst, mem);
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LoadlW(dst, dst);
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}
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void MacroAssembler::LoadLogicalReversedHalfWordP(Register dst,
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const MemOperand& mem) {
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lrvh(dst, mem);
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LoadLogicalHalfWordP(dst, dst);
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}
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// Load And Test (Reg <- Reg)
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void MacroAssembler::LoadAndTest32(Register dst, Register src) {
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ltr(dst, src);
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@ -112,7 +112,6 @@ bool AreAliased(Register reg1, Register reg2, Register reg3 = no_reg,
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#define LoadRR lgr
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#define LoadAndTestRR ltgr
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#define LoadImmP lghi
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#define LoadLogicalHalfWordP llgh
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// Compare
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#define CmpPH cghi
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@ -150,7 +149,6 @@ bool AreAliased(Register reg1, Register reg2, Register reg3 = no_reg,
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#define LoadRR lr
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#define LoadAndTestRR ltr
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#define LoadImmP lhi
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#define LoadLogicalHalfWordP llh
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// Compare
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#define CmpPH chi
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@ -333,10 +331,15 @@ class MacroAssembler : public Assembler {
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void LoadW(Register dst, Register src);
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void LoadlW(Register dst, const MemOperand& opnd, Register scratch = no_reg);
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void LoadlW(Register dst, Register src);
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void LoadLogicalHalfWordP(Register dst, const MemOperand& opnd);
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void LoadLogicalHalfWordP(Register dst, Register src);
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void LoadB(Register dst, const MemOperand& opnd);
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void LoadB(Register dst, Register src);
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void LoadlB(Register dst, const MemOperand& opnd);
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void LoadLogicalReversedWordP(Register dst, const MemOperand& opnd);
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void LoadLogicalReversedHalfWordP(Register dst, const MemOperand& opnd);
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// Load And Test
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void LoadAndTest32(Register dst, Register src);
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void LoadAndTestP_ExtendSrc(Register dst, Register src);
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