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[x64] Use Abspd Negpd macro assembler helpers

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For Float64Abs, Float64Neg, F64x2Abs, and F64x2Neg, we can use the Abspd
and Negpd helpers. These helpers will load the necessary masks as an
ExternalReference.

We cannot do the same with AVX, since the AVX codegen can already have
one of the inputs as an Operand.

Change-Id: I85f0a7437747b9cfe8bff735d7b27a957736818c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2599850
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71967}
This commit is contained in:
Zhi An Ng 2021-01-08 02:16:50 +00:00 committed by Commit Bot
parent 47edee6064
commit 5100c7d6a6
4 changed files with 19 additions and 28 deletions
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20
src/codegen/x64/macro-assembler-x64.cc
View File

@ -1436,16 +1436,6 @@ void MacroAssembler::Negps(XMMRegister dst) {
ExternalReference::address_of_float_neg_constant()));
}
void MacroAssembler::Abspd(XMMRegister dst) {
Andps(dst, ExternalReferenceAsOperand(
ExternalReference::address_of_double_abs_constant()));
}
void MacroAssembler::Negpd(XMMRegister dst) {
Xorps(dst, ExternalReferenceAsOperand(
ExternalReference::address_of_double_neg_constant()));
}
void MacroAssembler::Cmp(Register dst, Handle<Object> source) {
if (source->IsSmi()) {
Cmp(dst, Smi::cast(*source));
@ -2199,6 +2189,16 @@ void TurboAssembler::I16x8ExtMul(XMMRegister dst, XMMRegister src1,
}
}
void TurboAssembler::Abspd(XMMRegister dst) {
Andps(dst, ExternalReferenceAsOperand(
ExternalReference::address_of_double_abs_constant()));
}
void TurboAssembler::Negpd(XMMRegister dst) {
Xorps(dst, ExternalReferenceAsOperand(
ExternalReference::address_of_double_neg_constant()));
}
void TurboAssembler::Psrld(XMMRegister dst, byte imm8) {
Psrld(dst, dst, imm8);
}

5
src/codegen/x64/macro-assembler-x64.h
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@ -590,6 +590,9 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
void I16x8ExtMul(XMMRegister dst, XMMRegister src1, XMMRegister src2,
bool low, bool is_signed);
void Abspd(XMMRegister dst);
void Negpd(XMMRegister dst);
void CompareRoot(Register with, RootIndex index);
void CompareRoot(Operand with, RootIndex index);
@ -966,8 +969,6 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
// SIMD macros.
void Absps(XMMRegister dst);
void Negps(XMMRegister dst);
void Abspd(XMMRegister dst);
void Negpd(XMMRegister dst);
// Generates a trampoline to jump to the off-heap instruction stream.
void JumpToInstructionStream(Address entry);

12
src/compiler/backend/x64/code-generator-x64.cc
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@ -1683,20 +1683,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
}
case kX64F64x2Abs:
case kSSEFloat64Abs: {
// TODO(bmeurer): Use RIP relative 128-bit constants.
XMMRegister tmp = i.ToDoubleRegister(instr->TempAt(0));
__ Pcmpeqd(tmp, tmp);
__ Psrlq(tmp, 1);
__ Andpd(i.OutputDoubleRegister(), tmp);
__ Abspd(i.OutputDoubleRegister());
break;
}
case kX64F64x2Neg:
case kSSEFloat64Neg: {
// TODO(bmeurer): Use RIP relative 128-bit constants.
XMMRegister tmp = i.ToDoubleRegister(instr->TempAt(0));
__ Pcmpeqd(tmp, tmp);
__ Psllq(tmp, 63);
__ Xorpd(i.OutputDoubleRegister(), tmp);
__ Negpd(i.OutputDoubleRegister());
break;
}
case kSSEFloat64Sqrt:

10
src/compiler/backend/x64/instruction-selector-x64.cc
View File

@ -3214,16 +3214,14 @@ void InstructionSelector::VisitS128AndNot(Node* node) {
void InstructionSelector::VisitF64x2Abs(Node* node) {
X64OperandGenerator g(this);
InstructionOperand temps[] = {g.TempDoubleRegister()};
Emit(kX64F64x2Abs, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)),
arraysize(temps), temps);
Emit(kX64F64x2Abs, g.DefineSameAsFirst(node),
g.UseRegister(node->InputAt(0)));
}
void InstructionSelector::VisitF64x2Neg(Node* node) {
X64OperandGenerator g(this);
InstructionOperand temps[] = {g.TempDoubleRegister()};
Emit(kX64F64x2Neg, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)),
arraysize(temps), temps);
Emit(kX64F64x2Neg, g.DefineSameAsFirst(node),
g.UseRegister(node->InputAt(0)));
}
void InstructionSelector::VisitF32x4UConvertI32x4(Node* node) {