[compiler] Add helper functions HasAddressingMode, HasRegisterInput
This adds two helper functions in code-generator-{ia32,x64}:
- HasAddressingMode: is the addressing mode not equal to kNone?
- HasRegisterInput: is the specified input in a register?
Bug: v8:9534
Change-Id: I690ee52e247b347a7ef5ba0c98bba47c321ca6b5
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1748726
Commit-Queue: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Tobias Tebbi <tebbi@chromium.org>
Cr-Commit-Position: refs/heads/master@{#63157}
This commit is contained in:
Jakob Gruber
Commit Bot
parent
0aa204febf
commit
54eca65873
@ -205,10 +205,18 @@ class IA32OperandConverter : public InstructionOperandConverter {
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namespace {
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bool HasAddressingMode(Instruction* instr) {
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return instr->addressing_mode() != kMode_None;
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}
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bool HasImmediateInput(Instruction* instr, size_t index) {
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return instr->InputAt(index)->IsImmediate();
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}
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bool HasRegisterInput(Instruction* instr, size_t index) {
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return instr->InputAt(index)->IsRegister();
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}
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class OutOfLineLoadFloat32NaN final : public OutOfLineCode {
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public:
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OutOfLineLoadFloat32NaN(CodeGenerator* gen, XMMRegister result)
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@ -328,31 +336,31 @@ class OutOfLineRecordWrite final : public OutOfLineCode {
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} // namespace
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#define ASSEMBLE_COMPARE(asm_instr) \
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do { \
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if (AddressingModeField::decode(instr->opcode()) != kMode_None) { \
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size_t index = 0; \
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Operand left = i.MemoryOperand(&index); \
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if (HasImmediateInput(instr, index)) { \
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__ asm_instr(left, i.InputImmediate(index)); \
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} else { \
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__ asm_instr(left, i.InputRegister(index)); \
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} \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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if (instr->InputAt(0)->IsRegister()) { \
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__ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} \
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} else { \
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if (instr->InputAt(1)->IsRegister()) { \
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__ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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} \
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#define ASSEMBLE_COMPARE(asm_instr) \
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do { \
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if (HasAddressingMode(instr)) { \
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size_t index = 0; \
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Operand left = i.MemoryOperand(&index); \
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if (HasImmediateInput(instr, index)) { \
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__ asm_instr(left, i.InputImmediate(index)); \
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} else { \
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__ asm_instr(left, i.InputRegister(index)); \
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} \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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if (HasRegisterInput(instr, 0)) { \
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__ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} \
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} else { \
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if (HasRegisterInput(instr, 1)) { \
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__ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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} \
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} while (0)
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#define ASSEMBLE_IEEE754_BINOP(name) \
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@ -384,19 +392,19 @@ class OutOfLineRecordWrite final : public OutOfLineCode {
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__ add(esp, Immediate(kDoubleSize)); \
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} while (false)
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#define ASSEMBLE_BINOP(asm_instr) \
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do { \
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if (AddressingModeField::decode(instr->opcode()) != kMode_None) { \
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size_t index = 1; \
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Operand right = i.MemoryOperand(&index); \
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__ asm_instr(i.InputRegister(0), right); \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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#define ASSEMBLE_BINOP(asm_instr) \
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do { \
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if (HasAddressingMode(instr)) { \
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size_t index = 1; \
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Operand right = i.MemoryOperand(&index); \
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__ asm_instr(i.InputRegister(0), right); \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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} while (0)
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#define ASSEMBLE_ATOMIC_BINOP(bin_inst, mov_inst, cmpxchg_inst) \
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@ -433,9 +441,9 @@ class OutOfLineRecordWrite final : public OutOfLineCode {
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#define ASSEMBLE_MOVX(mov_instr) \
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do { \
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if (instr->addressing_mode() != kMode_None) { \
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if (HasAddressingMode(instr)) { \
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__ mov_instr(i.OutputRegister(), i.MemoryOperand()); \
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} else if (instr->InputAt(0)->IsRegister()) { \
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} else if (HasRegisterInput(instr, 0)) { \
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__ mov_instr(i.OutputRegister(), i.InputRegister(0)); \
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} else { \
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__ mov_instr(i.OutputRegister(), i.InputOperand(0)); \
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@ -931,7 +939,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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break;
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case kArchStackPointerGreaterThan: {
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constexpr size_t kValueIndex = 0;
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if (AddressingModeField::decode(instr->opcode()) != kMode_None) {
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if (HasAddressingMode(instr)) {
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__ cmp(esp, i.MemoryOperand(kValueIndex));
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} else {
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__ cmp(esp, i.InputRegister(kValueIndex));
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@ -1125,7 +1133,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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// i.InputRegister(2) ... right low word.
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// i.InputRegister(3) ... right high word.
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bool use_temp = false;
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if ((instr->InputAt(1)->IsRegister() &&
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if ((HasRegisterInput(instr, 1) &&
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i.OutputRegister(0).code() == i.InputRegister(1).code()) ||
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i.OutputRegister(0).code() == i.InputRegister(3).code()) {
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// We cannot write to the output register directly, because it would
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@ -1150,7 +1158,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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// i.InputRegister(2) ... right low word.
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// i.InputRegister(3) ... right high word.
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bool use_temp = false;
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if ((instr->InputAt(1)->IsRegister() &&
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if ((HasRegisterInput(instr, 1) &&
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i.OutputRegister(0).code() == i.InputRegister(1).code()) ||
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i.OutputRegister(0).code() == i.InputRegister(3).code()) {
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// We cannot write to the output register directly, because it would
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@ -1681,7 +1689,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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}
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break;
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case kIA32BitcastIF:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ movd(i.OutputDoubleRegister(), i.InputRegister(0));
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} else {
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__ movss(i.OutputDoubleRegister(), i.InputOperand(0));
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@ -1772,7 +1780,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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frame_access_state()->IncreaseSPDelta(kSimd128Size / kSystemPointerSize);
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break;
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case kIA32Push:
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if (AddressingModeField::decode(instr->opcode()) != kMode_None) {
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if (HasAddressingMode(instr)) {
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size_t index = 0;
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Operand operand = i.MemoryOperand(&index);
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__ push(operand);
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@ -155,10 +155,18 @@ class X64OperandConverter : public InstructionOperandConverter {
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namespace {
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bool HasAddressingMode(Instruction* instr) {
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return instr->addressing_mode() != kMode_None;
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}
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bool HasImmediateInput(Instruction* instr, size_t index) {
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return instr->InputAt(index)->IsImmediate();
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}
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bool HasRegisterInput(Instruction* instr, size_t index) {
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return instr->InputAt(index)->IsRegister();
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}
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class OutOfLineLoadFloat32NaN final : public OutOfLineCode {
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public:
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OutOfLineLoadFloat32NaN(CodeGenerator* gen, XMMRegister result)
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@ -384,60 +392,60 @@ void EmitWordLoadPoisoningIfNeeded(
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} \
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} while (false)
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#define ASSEMBLE_BINOP(asm_instr) \
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do { \
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if (AddressingModeField::decode(instr->opcode()) != kMode_None) { \
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size_t index = 1; \
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Operand right = i.MemoryOperand(&index); \
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__ asm_instr(i.InputRegister(0), right); \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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if (instr->InputAt(0)->IsRegister()) { \
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__ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} \
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} else { \
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if (instr->InputAt(1)->IsRegister()) { \
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__ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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} \
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#define ASSEMBLE_BINOP(asm_instr) \
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do { \
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if (HasAddressingMode(instr)) { \
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size_t index = 1; \
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Operand right = i.MemoryOperand(&index); \
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__ asm_instr(i.InputRegister(0), right); \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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if (HasRegisterInput(instr, 0)) { \
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__ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} \
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} else { \
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if (HasRegisterInput(instr, 1)) { \
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__ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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} \
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} while (false)
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#define ASSEMBLE_COMPARE(asm_instr) \
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do { \
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if (AddressingModeField::decode(instr->opcode()) != kMode_None) { \
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size_t index = 0; \
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Operand left = i.MemoryOperand(&index); \
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if (HasImmediateInput(instr, index)) { \
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__ asm_instr(left, i.InputImmediate(index)); \
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} else { \
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__ asm_instr(left, i.InputRegister(index)); \
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} \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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if (instr->InputAt(0)->IsRegister()) { \
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__ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} \
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} else { \
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if (instr->InputAt(1)->IsRegister()) { \
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__ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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} \
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#define ASSEMBLE_COMPARE(asm_instr) \
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do { \
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if (HasAddressingMode(instr)) { \
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size_t index = 0; \
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Operand left = i.MemoryOperand(&index); \
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if (HasImmediateInput(instr, index)) { \
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__ asm_instr(left, i.InputImmediate(index)); \
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} else { \
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__ asm_instr(left, i.InputRegister(index)); \
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} \
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} else { \
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if (HasImmediateInput(instr, 1)) { \
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if (HasRegisterInput(instr, 0)) { \
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__ asm_instr(i.InputRegister(0), i.InputImmediate(1)); \
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} else { \
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__ asm_instr(i.InputOperand(0), i.InputImmediate(1)); \
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} \
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} else { \
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if (HasRegisterInput(instr, 1)) { \
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__ asm_instr(i.InputRegister(0), i.InputRegister(1)); \
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} else { \
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__ asm_instr(i.InputRegister(0), i.InputOperand(1)); \
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} \
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} \
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} \
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} while (false)
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#define ASSEMBLE_MULT(asm_instr) \
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do { \
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if (HasImmediateInput(instr, 1)) { \
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if (instr->InputAt(0)->IsRegister()) { \
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if (HasRegisterInput(instr, 0)) { \
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__ asm_instr(i.OutputRegister(), i.InputRegister(0), \
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i.InputImmediate(1)); \
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} else { \
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@ -445,7 +453,7 @@ void EmitWordLoadPoisoningIfNeeded(
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i.InputImmediate(1)); \
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} \
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} else { \
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if (instr->InputAt(1)->IsRegister()) { \
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if (HasRegisterInput(instr, 1)) { \
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__ asm_instr(i.OutputRegister(), i.InputRegister(1)); \
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} else { \
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__ asm_instr(i.OutputRegister(), i.InputOperand(1)); \
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@ -472,9 +480,9 @@ void EmitWordLoadPoisoningIfNeeded(
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#define ASSEMBLE_MOVX(asm_instr) \
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do { \
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if (instr->addressing_mode() != kMode_None) { \
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if (HasAddressingMode(instr)) { \
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__ asm_instr(i.OutputRegister(), i.MemoryOperand()); \
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} else if (instr->InputAt(0)->IsRegister()) { \
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} else if (HasRegisterInput(instr, 0)) { \
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__ asm_instr(i.OutputRegister(), i.InputRegister(0)); \
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} else { \
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__ asm_instr(i.OutputRegister(), i.InputOperand(0)); \
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@ -1018,7 +1026,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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break;
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case kArchStackPointerGreaterThan: {
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constexpr size_t kValueIndex = 0;
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if (AddressingModeField::decode(instr->opcode()) != kMode_None) {
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if (HasAddressingMode(instr)) {
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__ cmpq(rsp, i.MemoryOperand(kValueIndex));
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} else {
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__ cmpq(rsp, i.InputRegister(kValueIndex));
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@ -1188,14 +1196,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_MULT(imulq);
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break;
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case kX64ImulHigh32:
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if (instr->InputAt(1)->IsRegister()) {
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if (HasRegisterInput(instr, 1)) {
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__ imull(i.InputRegister(1));
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} else {
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__ imull(i.InputOperand(1));
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}
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break;
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case kX64UmulHigh32:
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if (instr->InputAt(1)->IsRegister()) {
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if (HasRegisterInput(instr, 1)) {
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__ mull(i.InputRegister(1));
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} else {
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__ mull(i.InputOperand(1));
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@ -1266,42 +1274,42 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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ASSEMBLE_SHIFT(rorq, 6);
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break;
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case kX64Lzcnt:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Lzcntq(i.OutputRegister(), i.InputRegister(0));
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} else {
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__ Lzcntq(i.OutputRegister(), i.InputOperand(0));
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}
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break;
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case kX64Lzcnt32:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Lzcntl(i.OutputRegister(), i.InputRegister(0));
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} else {
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__ Lzcntl(i.OutputRegister(), i.InputOperand(0));
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}
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break;
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case kX64Tzcnt:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Tzcntq(i.OutputRegister(), i.InputRegister(0));
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} else {
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__ Tzcntq(i.OutputRegister(), i.InputOperand(0));
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}
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break;
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case kX64Tzcnt32:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Tzcntl(i.OutputRegister(), i.InputRegister(0));
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} else {
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__ Tzcntl(i.OutputRegister(), i.InputOperand(0));
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}
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break;
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case kX64Popcnt:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Popcntq(i.OutputRegister(), i.InputRegister(0));
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} else {
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__ Popcntq(i.OutputRegister(), i.InputOperand(0));
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}
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break;
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case kX64Popcnt32:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Popcntl(i.OutputRegister(), i.InputRegister(0));
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} else {
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__ Popcntl(i.OutputRegister(), i.InputOperand(0));
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@ -1671,56 +1679,56 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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break;
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}
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case kSSEInt32ToFloat64:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Cvtlsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
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} else {
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__ Cvtlsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
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}
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break;
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case kSSEInt32ToFloat32:
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if (instr->InputAt(0)->IsRegister()) {
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if (HasRegisterInput(instr, 0)) {
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__ Cvtlsi2ss(i.OutputDoubleRegister(), i.InputRegister(0));
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} else {
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__ Cvtlsi2ss(i.OutputDoubleRegister(), i.InputOperand(0));
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}
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break;
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case kSSEInt64ToFloat32:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Cvtqsi2ss(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Cvtqsi2ss(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
}
|
||||
break;
|
||||
case kSSEInt64ToFloat64:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Cvtqsi2sd(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Cvtqsi2sd(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
}
|
||||
break;
|
||||
case kSSEUint64ToFloat32:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Cvtqui2ss(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Cvtqui2ss(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
}
|
||||
break;
|
||||
case kSSEUint64ToFloat64:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Cvtqui2sd(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Cvtqui2sd(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
}
|
||||
break;
|
||||
case kSSEUint32ToFloat64:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Cvtlui2sd(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Cvtlui2sd(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
}
|
||||
break;
|
||||
case kSSEUint32ToFloat32:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Cvtlui2ss(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Cvtlui2ss(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
@ -1741,21 +1749,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
break;
|
||||
case kSSEFloat64InsertLowWord32:
|
||||
if (instr->InputAt(1)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 1)) {
|
||||
__ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 0);
|
||||
} else {
|
||||
__ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 0);
|
||||
}
|
||||
break;
|
||||
case kSSEFloat64InsertHighWord32:
|
||||
if (instr->InputAt(1)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 1)) {
|
||||
__ Pinsrd(i.OutputDoubleRegister(), i.InputRegister(1), 1);
|
||||
} else {
|
||||
__ Pinsrd(i.OutputDoubleRegister(), i.InputOperand(1), 1);
|
||||
}
|
||||
break;
|
||||
case kSSEFloat64LoadLowWord32:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Movd(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Movd(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
@ -1941,14 +1949,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
case kX64Movl:
|
||||
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, i, __ pc_offset());
|
||||
if (instr->HasOutput()) {
|
||||
if (instr->addressing_mode() == kMode_None) {
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasAddressingMode(instr)) {
|
||||
__ movl(i.OutputRegister(), i.MemoryOperand());
|
||||
} else {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ movl(i.OutputRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ movl(i.OutputRegister(), i.InputOperand(0));
|
||||
}
|
||||
} else {
|
||||
__ movl(i.OutputRegister(), i.MemoryOperand());
|
||||
}
|
||||
__ AssertZeroExtended(i.OutputRegister());
|
||||
} else {
|
||||
@ -2094,14 +2102,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
break;
|
||||
case kX64BitcastIF:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Movd(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Movss(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
}
|
||||
break;
|
||||
case kX64BitcastLD:
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ Movq(i.OutputDoubleRegister(), i.InputRegister(0));
|
||||
} else {
|
||||
__ Movsd(i.OutputDoubleRegister(), i.InputOperand(0));
|
||||
@ -2189,7 +2197,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
__ incl(i.OutputRegister());
|
||||
break;
|
||||
case kX64Push:
|
||||
if (AddressingModeField::decode(instr->opcode()) != kMode_None) {
|
||||
if (HasAddressingMode(instr)) {
|
||||
size_t index = 0;
|
||||
Operand operand = i.MemoryOperand(&index);
|
||||
__ pushq(operand);
|
||||
@ -2201,7 +2209,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
frame_access_state()->IncreaseSPDelta(1);
|
||||
unwinding_info_writer_.MaybeIncreaseBaseOffsetAt(__ pc_offset(),
|
||||
kSystemPointerSize);
|
||||
} else if (instr->InputAt(0)->IsRegister()) {
|
||||
} else if (HasRegisterInput(instr, 0)) {
|
||||
__ pushq(i.InputRegister(0));
|
||||
frame_access_state()->IncreaseSPDelta(1);
|
||||
unwinding_info_writer_.MaybeIncreaseBaseOffsetAt(__ pc_offset(),
|
||||
@ -2532,7 +2540,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
case kX64I64x2Splat: {
|
||||
CpuFeatureScope sse_scope(tasm(), SSE3);
|
||||
XMMRegister dst = i.OutputSimd128Register();
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ movq(dst, i.InputRegister(0));
|
||||
} else {
|
||||
__ movq(dst, i.InputOperand(0));
|
||||
@ -2547,7 +2555,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
case kX64I64x2ReplaceLane: {
|
||||
CpuFeatureScope sse_scope(tasm(), SSE4_1);
|
||||
if (instr->InputAt(2)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 2)) {
|
||||
__ pinsrq(i.OutputSimd128Register(), i.InputRegister(2),
|
||||
i.InputInt8(1));
|
||||
} else {
|
||||
@ -2776,7 +2784,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
case kX64I32x4Splat: {
|
||||
XMMRegister dst = i.OutputSimd128Register();
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ movd(dst, i.InputRegister(0));
|
||||
} else {
|
||||
__ movd(dst, i.InputOperand(0));
|
||||
@ -2791,7 +2799,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
case kX64I32x4ReplaceLane: {
|
||||
CpuFeatureScope sse_scope(tasm(), SSE4_1);
|
||||
if (instr->InputAt(2)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 2)) {
|
||||
__ Pinsrd(i.OutputSimd128Register(), i.InputRegister(2),
|
||||
i.InputInt8(1));
|
||||
} else {
|
||||
@ -2985,7 +2993,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
case kX64I16x8Splat: {
|
||||
XMMRegister dst = i.OutputSimd128Register();
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ movd(dst, i.InputRegister(0));
|
||||
} else {
|
||||
__ movd(dst, i.InputOperand(0));
|
||||
@ -3003,7 +3011,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
case kX64I16x8ReplaceLane: {
|
||||
CpuFeatureScope sse_scope(tasm(), SSE4_1);
|
||||
if (instr->InputAt(2)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 2)) {
|
||||
__ pinsrw(i.OutputSimd128Register(), i.InputRegister(2),
|
||||
i.InputInt8(1));
|
||||
} else {
|
||||
@ -3180,7 +3188,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
case kX64I8x16Splat: {
|
||||
CpuFeatureScope sse_scope(tasm(), SSSE3);
|
||||
XMMRegister dst = i.OutputSimd128Register();
|
||||
if (instr->InputAt(0)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 0)) {
|
||||
__ movd(dst, i.InputRegister(0));
|
||||
} else {
|
||||
__ movd(dst, i.InputOperand(0));
|
||||
@ -3198,7 +3206,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
||||
}
|
||||
case kX64I8x16ReplaceLane: {
|
||||
CpuFeatureScope sse_scope(tasm(), SSE4_1);
|
||||
if (instr->InputAt(2)->IsRegister()) {
|
||||
if (HasRegisterInput(instr, 2)) {
|
||||
__ pinsrb(i.OutputSimd128Register(), i.InputRegister(2),
|
||||
i.InputInt8(1));
|
||||
} else {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user