Fixed lint errors caused by "runtime/references" rule (Is this a non-const reference?) and the rule itself is restored.

BUG=v8:3326
LOG=N
R=jkummerow@chromium.org

Review URL: https://codereview.chromium.org/314723002

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21651 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
ishell@chromium.org 2014-06-03 15:45:38 +00:00
parent 2f1daf4aaa
commit 55443af648
24 changed files with 136 additions and 132 deletions

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@ -1849,7 +1849,7 @@ class LCallJSFunction V8_FINAL : public LTemplateInstruction<1, 1, 0> {
class LCallWithDescriptor V8_FINAL : public LTemplateResultInstruction<1> {
public:
LCallWithDescriptor(const CallInterfaceDescriptor* descriptor,
ZoneList<LOperand*>& operands,
const ZoneList<LOperand*>& operands,
Zone* zone)
: descriptor_(descriptor),
inputs_(descriptor->environment_length() + 1, zone) {

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@ -1518,7 +1518,7 @@ class LInteger32ToDouble V8_FINAL : public LTemplateInstruction<1, 1, 0> {
class LCallWithDescriptor V8_FINAL : public LTemplateResultInstruction<1> {
public:
LCallWithDescriptor(const CallInterfaceDescriptor* descriptor,
ZoneList<LOperand*>& operands,
const ZoneList<LOperand*>& operands,
Zone* zone)
: descriptor_(descriptor),
inputs_(descriptor->environment_length() + 1, zone) {

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@ -83,7 +83,7 @@ static int LengthWithoutIncompleteUtf8(char* buffer, int len) {
static bool WaitOnFD(int fd,
int read_timeout,
int total_timeout,
struct timeval& start_time) {
const struct timeval& start_time) {
fd_set readfds, writefds, exceptfds;
struct timeval timeout;
int gone = 0;
@ -206,8 +206,8 @@ class ExecArgs {
}
}
static const unsigned kMaxArgs = 1000;
char** arg_array() { return exec_args_; }
char* arg0() { return exec_args_[0]; }
char* const* arg_array() const { return exec_args_; }
const char* arg0() const { return exec_args_[0]; }
private:
char* exec_args_[kMaxArgs + 1];
@ -249,7 +249,7 @@ static const int kWriteFD = 1;
// It only returns if an error occurred.
static void ExecSubprocess(int* exec_error_fds,
int* stdout_fds,
ExecArgs& exec_args) {
const ExecArgs& exec_args) {
close(exec_error_fds[kReadFD]); // Don't need this in the child.
close(stdout_fds[kReadFD]); // Don't need this in the child.
close(1); // Close stdout.
@ -288,7 +288,7 @@ static bool ChildLaunchedOK(Isolate* isolate, int* exec_error_fds) {
// succeeded or false if an exception was thrown.
static Handle<Value> GetStdout(Isolate* isolate,
int child_fd,
struct timeval& start_time,
const struct timeval& start_time,
int read_timeout,
int total_timeout) {
Handle<String> accumulator = String::Empty(isolate);
@ -360,8 +360,8 @@ static Handle<Value> GetStdout(Isolate* isolate,
// Get exit status of child.
static bool WaitForChild(Isolate* isolate,
int pid,
ZombieProtector& child_waiter,
struct timeval& start_time,
ZombieProtector& child_waiter, // NOLINT
const struct timeval& start_time,
int read_timeout,
int total_timeout) {
#ifdef HAS_WAITID

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@ -1806,8 +1806,10 @@ Address Heap::DoScavenge(ObjectVisitor* scavenge_visitor,
}
STATIC_ASSERT((FixedDoubleArray::kHeaderSize & kDoubleAlignmentMask) == 0);
STATIC_ASSERT((ConstantPoolArray::kHeaderSize & kDoubleAlignmentMask) == 0);
STATIC_ASSERT((FixedDoubleArray::kHeaderSize &
kDoubleAlignmentMask) == 0); // NOLINT
STATIC_ASSERT((ConstantPoolArray::kHeaderSize &
kDoubleAlignmentMask) == 0); // NOLINT
INLINE(static HeapObject* EnsureDoubleAligned(Heap* heap,

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@ -2716,7 +2716,7 @@ class IntrusiveMarking {
private:
static const uintptr_t kNotMarkedBit = 0x1;
STATIC_ASSERT((kHeapObjectTag & kNotMarkedBit) != 0);
STATIC_ASSERT((kHeapObjectTag & kNotMarkedBit) != 0); // NOLINT
};

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@ -2293,7 +2293,7 @@ class HCallWithDescriptor V8_FINAL : public HInstruction {
HValue* target,
int argument_count,
const CallInterfaceDescriptor* descriptor,
Vector<HValue*>& operands) {
const Vector<HValue*>& operands) {
ASSERT(operands.length() == descriptor->environment_length());
HCallWithDescriptor* res =
new(zone) HCallWithDescriptor(target, argument_count,
@ -2346,7 +2346,7 @@ class HCallWithDescriptor V8_FINAL : public HInstruction {
HCallWithDescriptor(HValue* target,
int argument_count,
const CallInterfaceDescriptor* descriptor,
Vector<HValue*>& operands,
const Vector<HValue*>& operands,
Zone* zone)
: descriptor_(descriptor),
values_(descriptor->environment_length() + 1, zone) {

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@ -1862,7 +1862,7 @@ class LCallJSFunction V8_FINAL : public LTemplateInstruction<1, 1, 0> {
class LCallWithDescriptor V8_FINAL : public LTemplateResultInstruction<1> {
public:
LCallWithDescriptor(const CallInterfaceDescriptor* descriptor,
ZoneList<LOperand*>& operands,
const ZoneList<LOperand*>& operands,
Zone* zone)
: inputs_(descriptor->environment_length() + 1, zone) {
ASSERT(descriptor->environment_length() + 1 == operands.length());

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@ -2960,7 +2960,7 @@ Handle<Object> CompareNilIC::CompareNil(Handle<Object> object) {
Handle<Map> monomorphic_map(already_monomorphic && FirstTargetMap() != NULL
? FirstTargetMap()
: HeapObject::cast(*object)->map());
code = isolate()->stub_cache()->ComputeCompareNil(monomorphic_map, stub);
code = isolate()->stub_cache()->ComputeCompareNil(monomorphic_map, &stub);
} else {
code = stub.GetCode();
}

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@ -1205,8 +1205,8 @@ int Trace::FindAffectedRegisters(OutSet* affected_registers,
void Trace::RestoreAffectedRegisters(RegExpMacroAssembler* assembler,
int max_register,
OutSet& registers_to_pop,
OutSet& registers_to_clear) {
const OutSet& registers_to_pop,
const OutSet& registers_to_clear) {
for (int reg = max_register; reg >= 0; reg--) {
if (registers_to_pop.Get(reg)) assembler->PopRegister(reg);
else if (registers_to_clear.Get(reg)) {
@ -1222,7 +1222,7 @@ void Trace::RestoreAffectedRegisters(RegExpMacroAssembler* assembler,
void Trace::PerformDeferredActions(RegExpMacroAssembler* assembler,
int max_register,
OutSet& affected_registers,
const OutSet& affected_registers,
OutSet* registers_to_pop,
OutSet* registers_to_clear,
Zone* zone) {
@ -5547,7 +5547,7 @@ void OutSet::Set(unsigned value, Zone *zone) {
}
bool OutSet::Get(unsigned value) {
bool OutSet::Get(unsigned value) const {
if (value < kFirstLimit) {
return (first_ & (1 << value)) != 0;
} else if (remaining_ == NULL) {

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@ -296,7 +296,7 @@ class OutSet: public ZoneObject {
public:
OutSet() : first_(0), remaining_(NULL), successors_(NULL) { }
OutSet* Extend(unsigned value, Zone* zone);
bool Get(unsigned value);
bool Get(unsigned value) const;
static const unsigned kFirstLimit = 32;
private:
@ -1465,14 +1465,14 @@ class Trace {
int FindAffectedRegisters(OutSet* affected_registers, Zone* zone);
void PerformDeferredActions(RegExpMacroAssembler* macro,
int max_register,
OutSet& affected_registers,
const OutSet& affected_registers,
OutSet* registers_to_pop,
OutSet* registers_to_clear,
Zone* zone);
void RestoreAffectedRegisters(RegExpMacroAssembler* macro,
int max_register,
OutSet& registers_to_pop,
OutSet& registers_to_clear);
const OutSet& registers_to_pop,
const OutSet& registers_to_clear);
int cp_offset_;
DeferredAction* actions_;
Label* backtrack_;

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@ -1743,7 +1743,7 @@ class MultipleFunctionTarget {
LiveEdit::FunctionPatchabilityStatus status) {
return CheckActivation(m_shared_info_array, m_result, frame, status);
}
const char* GetNotFoundMessage() {
const char* GetNotFoundMessage() const {
return NULL;
}
private:
@ -1755,7 +1755,9 @@ class MultipleFunctionTarget {
// Drops all call frame matched by target and all frames above them.
template<typename TARGET>
static const char* DropActivationsInActiveThreadImpl(
Isolate* isolate, TARGET& target, bool do_drop) {
Isolate* isolate,
TARGET& target, // NOLINT
bool do_drop) {
Debug* debug = isolate->debug();
Zone zone(isolate);
Vector<StackFrame*> frames = CreateStackMap(isolate, &zone);
@ -2013,7 +2015,7 @@ class SingleFrameTarget {
}
return false;
}
const char* GetNotFoundMessage() {
const char* GetNotFoundMessage() const {
return "Failed to found requested frame";
}
LiveEdit::FunctionPatchabilityStatus saved_status() {

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@ -250,28 +250,30 @@ static const int kNegOffset = 0x00008000;
// addiu(sp, sp, 4) aka Pop() operation or part of Pop(r)
// operations as post-increment of sp.
const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
| (kRegister_sp_Code << kRtShift) | (kPointerSize & kImm16Mask);
| (kRegister_sp_Code << kRtShift)
| (kPointerSize & kImm16Mask); // NOLINT
// addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
| (kRegister_sp_Code << kRtShift) | (-kPointerSize & kImm16Mask);
| (kRegister_sp_Code << kRtShift)
| (-kPointerSize & kImm16Mask); // NOLINT
// sw(r, MemOperand(sp, 0))
const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
| (0 & kImm16Mask);
| (0 & kImm16Mask); // NOLINT
// lw(r, MemOperand(sp, 0))
const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
| (0 & kImm16Mask);
| (0 & kImm16Mask); // NOLINT
const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
| (0 & kImm16Mask);
| (0 & kImm16Mask); // NOLINT
const Instr kSwRegFpOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
| (0 & kImm16Mask);
| (0 & kImm16Mask); // NOLINT
const Instr kLwRegFpNegOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
| (kNegOffset & kImm16Mask);
| (kNegOffset & kImm16Mask); // NOLINT
const Instr kSwRegFpNegOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
| (kNegOffset & kImm16Mask);
| (kNegOffset & kImm16Mask); // NOLINT
// A mask for the Rt register for push, pop, lw, sw instructions.
const Instr kRtMask = kRtFieldMask;
const Instr kLwSwInstrTypeMask = 0xffe00000;

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@ -5458,8 +5458,8 @@ void LCodeGen::DoTypeofIsAndBranch(LTypeofIsAndBranch* instr) {
instr->FalseLabel(chunk_),
input,
instr->type_literal(),
cmp1,
cmp2);
&cmp1,
&cmp2);
ASSERT(cmp1.is_valid());
ASSERT(!cmp2.is_reg() || cmp2.rm().is_valid());
@ -5474,8 +5474,8 @@ Condition LCodeGen::EmitTypeofIs(Label* true_label,
Label* false_label,
Register input,
Handle<String> type_name,
Register& cmp1,
Operand& cmp2) {
Register* cmp1,
Operand* cmp2) {
// This function utilizes the delay slot heavily. This is used to load
// values that are always usable without depending on the type of the input
// register.
@ -5486,8 +5486,8 @@ Condition LCodeGen::EmitTypeofIs(Label* true_label,
__ JumpIfSmi(input, true_label);
__ lw(input, FieldMemOperand(input, HeapObject::kMapOffset));
__ LoadRoot(at, Heap::kHeapNumberMapRootIndex);
cmp1 = input;
cmp2 = Operand(at);
*cmp1 = input;
*cmp2 = Operand(at);
final_branch_condition = eq;
} else if (String::Equals(type_name, factory->string_string())) {
@ -5499,30 +5499,30 @@ Condition LCodeGen::EmitTypeofIs(Label* true_label,
// other branch.
__ lbu(at, FieldMemOperand(input, Map::kBitFieldOffset));
__ And(at, at, 1 << Map::kIsUndetectable);
cmp1 = at;
cmp2 = Operand(zero_reg);
*cmp1 = at;
*cmp2 = Operand(zero_reg);
final_branch_condition = eq;
} else if (String::Equals(type_name, factory->symbol_string())) {
__ JumpIfSmi(input, false_label);
__ GetObjectType(input, input, scratch);
cmp1 = scratch;
cmp2 = Operand(SYMBOL_TYPE);
*cmp1 = scratch;
*cmp2 = Operand(SYMBOL_TYPE);
final_branch_condition = eq;
} else if (String::Equals(type_name, factory->boolean_string())) {
__ LoadRoot(at, Heap::kTrueValueRootIndex);
__ Branch(USE_DELAY_SLOT, true_label, eq, at, Operand(input));
__ LoadRoot(at, Heap::kFalseValueRootIndex);
cmp1 = at;
cmp2 = Operand(input);
*cmp1 = at;
*cmp2 = Operand(input);
final_branch_condition = eq;
} else if (FLAG_harmony_typeof &&
String::Equals(type_name, factory->null_string())) {
__ LoadRoot(at, Heap::kNullValueRootIndex);
cmp1 = at;
cmp2 = Operand(input);
*cmp1 = at;
*cmp2 = Operand(input);
final_branch_condition = eq;
} else if (String::Equals(type_name, factory->undefined_string())) {
@ -5535,8 +5535,8 @@ Condition LCodeGen::EmitTypeofIs(Label* true_label,
__ lw(input, FieldMemOperand(input, HeapObject::kMapOffset));
__ lbu(at, FieldMemOperand(input, Map::kBitFieldOffset));
__ And(at, at, 1 << Map::kIsUndetectable);
cmp1 = at;
cmp2 = Operand(zero_reg);
*cmp1 = at;
*cmp2 = Operand(zero_reg);
final_branch_condition = ne;
} else if (String::Equals(type_name, factory->function_string())) {
@ -5544,8 +5544,8 @@ Condition LCodeGen::EmitTypeofIs(Label* true_label,
__ JumpIfSmi(input, false_label);
__ GetObjectType(input, scratch, input);
__ Branch(true_label, eq, input, Operand(JS_FUNCTION_TYPE));
cmp1 = input;
cmp2 = Operand(JS_FUNCTION_PROXY_TYPE);
*cmp1 = input;
*cmp2 = Operand(JS_FUNCTION_PROXY_TYPE);
final_branch_condition = eq;
} else if (String::Equals(type_name, factory->object_string())) {
@ -5564,13 +5564,13 @@ Condition LCodeGen::EmitTypeofIs(Label* true_label,
// Check for undetectable objects => false.
__ lbu(at, FieldMemOperand(map, Map::kBitFieldOffset));
__ And(at, at, 1 << Map::kIsUndetectable);
cmp1 = at;
cmp2 = Operand(zero_reg);
*cmp1 = at;
*cmp2 = Operand(zero_reg);
final_branch_condition = eq;
} else {
cmp1 = at;
cmp2 = Operand(zero_reg); // Set to valid regs, to avoid caller assertion.
*cmp1 = at;
*cmp2 = Operand(zero_reg); // Set to valid regs, to avoid caller assertion.
__ Branch(false_label);
}

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@ -316,8 +316,8 @@ class LCodeGen: public LCodeGenBase {
Label* false_label,
Register input,
Handle<String> type_name,
Register& cmp1,
Operand& cmp2);
Register* cmp1,
Operand* cmp2);
// Emits optimized code for %_IsObject(x). Preserves input register.
// Returns the condition on which a final split to

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@ -1810,7 +1810,7 @@ class LCallJSFunction V8_FINAL : public LTemplateInstruction<1, 1, 0> {
class LCallWithDescriptor V8_FINAL : public LTemplateResultInstruction<1> {
public:
LCallWithDescriptor(const CallInterfaceDescriptor* descriptor,
ZoneList<LOperand*>& operands,
const ZoneList<LOperand*>& operands,
Zone* zone)
: descriptor_(descriptor),
inputs_(descriptor->environment_length() + 1, zone) {

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@ -1706,12 +1706,12 @@ void Simulator::SignalExceptions() {
// Handle execution based on instruction types.
void Simulator::ConfigureTypeRegister(Instruction* instr,
int32_t& alu_out,
int64_t& i64hilo,
uint64_t& u64hilo,
int32_t& next_pc,
int32_t& return_addr_reg,
bool& do_interrupt) {
int32_t* alu_out,
int64_t* i64hilo,
uint64_t* u64hilo,
int32_t* next_pc,
int32_t* return_addr_reg,
bool* do_interrupt) {
// Every local variable declared here needs to be const.
// This is to make sure that changed values are sent back to
// DecodeTypeRegister correctly.
@ -1740,10 +1740,10 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
case CFC1:
// At the moment only FCSR is supported.
ASSERT(fs_reg == kFCSRRegister);
alu_out = FCSR_;
*alu_out = FCSR_;
break;
case MFC1:
alu_out = get_fpu_register(fs_reg);
*alu_out = get_fpu_register(fs_reg);
break;
case MFHC1:
UNIMPLEMENTED_MIPS();
@ -1770,56 +1770,56 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
switch (instr->FunctionFieldRaw()) {
case JR:
case JALR:
next_pc = get_register(instr->RsValue());
return_addr_reg = instr->RdValue();
*next_pc = get_register(instr->RsValue());
*return_addr_reg = instr->RdValue();
break;
case SLL:
alu_out = rt << sa;
*alu_out = rt << sa;
break;
case SRL:
if (rs_reg == 0) {
// Regular logical right shift of a word by a fixed number of
// bits instruction. RS field is always equal to 0.
alu_out = rt_u >> sa;
*alu_out = rt_u >> sa;
} else {
// Logical right-rotate of a word by a fixed number of bits. This
// is special case of SRL instruction, added in MIPS32 Release 2.
// RS field is equal to 00001.
alu_out = (rt_u >> sa) | (rt_u << (32 - sa));
*alu_out = (rt_u >> sa) | (rt_u << (32 - sa));
}
break;
case SRA:
alu_out = rt >> sa;
*alu_out = rt >> sa;
break;
case SLLV:
alu_out = rt << rs;
*alu_out = rt << rs;
break;
case SRLV:
if (sa == 0) {
// Regular logical right-shift of a word by a variable number of
// bits instruction. SA field is always equal to 0.
alu_out = rt_u >> rs;
*alu_out = rt_u >> rs;
} else {
// Logical right-rotate of a word by a variable number of bits.
// This is special case od SRLV instruction, added in MIPS32
// Release 2. SA field is equal to 00001.
alu_out = (rt_u >> rs_u) | (rt_u << (32 - rs_u));
*alu_out = (rt_u >> rs_u) | (rt_u << (32 - rs_u));
}
break;
case SRAV:
alu_out = rt >> rs;
*alu_out = rt >> rs;
break;
case MFHI:
alu_out = get_register(HI);
*alu_out = get_register(HI);
break;
case MFLO:
alu_out = get_register(LO);
*alu_out = get_register(LO);
break;
case MULT:
i64hilo = static_cast<int64_t>(rs) * static_cast<int64_t>(rt);
*i64hilo = static_cast<int64_t>(rs) * static_cast<int64_t>(rt);
break;
case MULTU:
u64hilo = static_cast<uint64_t>(rs_u) * static_cast<uint64_t>(rt_u);
*u64hilo = static_cast<uint64_t>(rs_u) * static_cast<uint64_t>(rt_u);
break;
case ADD:
if (HaveSameSign(rs, rt)) {
@ -1829,10 +1829,10 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
exceptions[kIntegerUnderflow] = rs < (Registers::kMinValue - rt);
}
}
alu_out = rs + rt;
*alu_out = rs + rt;
break;
case ADDU:
alu_out = rs + rt;
*alu_out = rs + rt;
break;
case SUB:
if (!HaveSameSign(rs, rt)) {
@ -1842,51 +1842,50 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
exceptions[kIntegerUnderflow] = rs < (Registers::kMinValue + rt);
}
}
alu_out = rs - rt;
*alu_out = rs - rt;
break;
case SUBU:
alu_out = rs - rt;
*alu_out = rs - rt;
break;
case AND:
alu_out = rs & rt;
*alu_out = rs & rt;
break;
case OR:
alu_out = rs | rt;
*alu_out = rs | rt;
break;
case XOR:
alu_out = rs ^ rt;
*alu_out = rs ^ rt;
break;
case NOR:
alu_out = ~(rs | rt);
*alu_out = ~(rs | rt);
break;
case SLT:
alu_out = rs < rt ? 1 : 0;
*alu_out = rs < rt ? 1 : 0;
break;
case SLTU:
alu_out = rs_u < rt_u ? 1 : 0;
*alu_out = rs_u < rt_u ? 1 : 0;
break;
// Break and trap instructions.
case BREAK:
do_interrupt = true;
*do_interrupt = true;
break;
case TGE:
do_interrupt = rs >= rt;
*do_interrupt = rs >= rt;
break;
case TGEU:
do_interrupt = rs_u >= rt_u;
*do_interrupt = rs_u >= rt_u;
break;
case TLT:
do_interrupt = rs < rt;
*do_interrupt = rs < rt;
break;
case TLTU:
do_interrupt = rs_u < rt_u;
*do_interrupt = rs_u < rt_u;
break;
case TEQ:
do_interrupt = rs == rt;
*do_interrupt = rs == rt;
break;
case TNE:
do_interrupt = rs != rt;
*do_interrupt = rs != rt;
break;
case MOVN:
case MOVZ:
@ -1904,13 +1903,13 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
case SPECIAL2:
switch (instr->FunctionFieldRaw()) {
case MUL:
alu_out = rs_u * rt_u; // Only the lower 32 bits are kept.
*alu_out = rs_u * rt_u; // Only the lower 32 bits are kept.
break;
case CLZ:
// MIPS32 spec: If no bits were set in GPR rs, the result written to
// GPR rd is 32.
// GCC __builtin_clz: If input is 0, the result is undefined.
alu_out =
*alu_out =
rs_u == 0 ? 32 : CompilerIntrinsics::CountLeadingZeros(rs_u);
break;
default:
@ -1926,7 +1925,7 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
uint16_t lsb = sa;
uint16_t size = msb - lsb + 1;
uint32_t mask = (1 << size) - 1;
alu_out = (rt_u & ~(mask << lsb)) | ((rs_u & mask) << lsb);
*alu_out = (rt_u & ~(mask << lsb)) | ((rs_u & mask) << lsb);
break;
}
case EXT: { // Mips32r2 instruction.
@ -1936,7 +1935,7 @@ void Simulator::ConfigureTypeRegister(Instruction* instr,
uint16_t lsb = sa;
uint16_t size = msb + 1;
uint32_t mask = (1 << size) - 1;
alu_out = (rs_u & (mask << lsb)) >> lsb;
*alu_out = (rs_u & (mask << lsb)) >> lsb;
break;
}
default:
@ -1984,12 +1983,12 @@ void Simulator::DecodeTypeRegister(Instruction* instr) {
// Set up the variables if needed before executing the instruction.
ConfigureTypeRegister(instr,
alu_out,
i64hilo,
u64hilo,
next_pc,
return_addr_reg,
do_interrupt);
&alu_out,
&i64hilo,
&u64hilo,
&next_pc,
&return_addr_reg,
&do_interrupt);
// ---------- Raise exceptions triggered.
SignalExceptions();

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@ -263,12 +263,12 @@ class Simulator {
// Helper function for DecodeTypeRegister.
void ConfigureTypeRegister(Instruction* instr,
int32_t& alu_out,
int64_t& i64hilo,
uint64_t& u64hilo,
int32_t& next_pc,
int32_t& return_addr_reg,
bool& do_interrupt);
int32_t* alu_out,
int64_t* i64hilo,
uint64_t* u64hilo,
int32_t* next_pc,
int32_t* return_addr_reg,
bool* do_interrupt);
void DecodeTypeImmediate(Instruction* instr);
void DecodeTypeJump(Instruction* instr);

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@ -582,12 +582,12 @@ enum StringRepresentationTag {
};
const uint32_t kIsIndirectStringMask = 0x1;
const uint32_t kIsIndirectStringTag = 0x1;
STATIC_ASSERT((kSeqStringTag & kIsIndirectStringMask) == 0);
STATIC_ASSERT((kExternalStringTag & kIsIndirectStringMask) == 0);
STATIC_ASSERT(
(kConsStringTag & kIsIndirectStringMask) == kIsIndirectStringTag);
STATIC_ASSERT(
(kSlicedStringTag & kIsIndirectStringMask) == kIsIndirectStringTag);
STATIC_ASSERT((kSeqStringTag & kIsIndirectStringMask) == 0); // NOLINT
STATIC_ASSERT((kExternalStringTag & kIsIndirectStringMask) == 0); // NOLINT
STATIC_ASSERT((kConsStringTag &
kIsIndirectStringMask) == kIsIndirectStringTag); // NOLINT
STATIC_ASSERT((kSlicedStringTag &
kIsIndirectStringMask) == kIsIndirectStringTag); // NOLINT
// Use this mask to distinguish between cons and slice only after making
// sure that the string is one of the two (an indirect string).

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@ -302,17 +302,17 @@ Handle<Code> StubCache::ComputeStore(InlineCacheState ic_state,
Handle<Code> StubCache::ComputeCompareNil(Handle<Map> receiver_map,
CompareNilICStub& stub) {
CompareNilICStub* stub) {
Handle<String> name(isolate_->heap()->empty_string());
if (!receiver_map->is_shared()) {
Handle<Code> cached_ic = FindIC(name, receiver_map, Code::COMPARE_NIL_IC,
stub.GetExtraICState());
stub->GetExtraICState());
if (!cached_ic.is_null()) return cached_ic;
}
Code::FindAndReplacePattern pattern;
pattern.Add(isolate_->factory()->meta_map(), receiver_map);
Handle<Code> ic = stub.GetCodeCopy(pattern);
Handle<Code> ic = stub->GetCodeCopy(pattern);
if (!receiver_map->is_shared()) {
Map::UpdateCodeCache(receiver_map, name, ic);

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@ -92,7 +92,7 @@ class StubCache {
// ---
Handle<Code> ComputeCompareNil(Handle<Map> receiver_map,
CompareNilICStub& stub);
CompareNilICStub* stub);
// ---

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@ -1833,7 +1833,7 @@ class LCallJSFunction V8_FINAL : public LTemplateInstruction<1, 1, 0> {
class LCallWithDescriptor V8_FINAL : public LTemplateResultInstruction<1> {
public:
LCallWithDescriptor(const CallInterfaceDescriptor* descriptor,
ZoneList<LOperand*>& operands,
const ZoneList<LOperand*>& operands,
Zone* zone)
: inputs_(descriptor->environment_length() + 1, zone) {
ASSERT(descriptor->environment_length() + 1 == operands.length());

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@ -1877,7 +1877,7 @@ class LCallJSFunction V8_FINAL : public LTemplateInstruction<1, 1, 0> {
class LCallWithDescriptor V8_FINAL : public LTemplateResultInstruction<1> {
public:
LCallWithDescriptor(const CallInterfaceDescriptor* descriptor,
ZoneList<LOperand*>& operands,
const ZoneList<LOperand*>& operands,
Zone* zone)
: inputs_(descriptor->environment_length() + 1, zone) {
ASSERT(descriptor->environment_length() + 1 == operands.length());

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@ -7890,7 +7890,7 @@ THREADED_TEST(StringWrite) {
static void Utf16Helper(
LocalContext& context,
LocalContext& context, // NOLINT
const char* name,
const char* lengths_name,
int len) {
@ -7917,7 +7917,7 @@ static uint16_t StringGet(Handle<String> str, int index) {
static void WriteUtf8Helper(
LocalContext& context,
LocalContext& context, // NOLINT
const char* name,
const char* lengths_name,
int len) {

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@ -48,8 +48,6 @@ from subprocess import PIPE
# Disabled LINT rules and reason.
# build/include_what_you_use: Started giving false positives for variables
# named "string" and "map" assuming that you needed to include STL headers.
# runtime/references: Started giving a lot of positives after depot-tools
# update. To be fixed soon: v8:3326.
ENABLED_LINT_RULES = """
build/class
@ -82,6 +80,7 @@ runtime/mutex
runtime/nonconf
runtime/printf
runtime/printf_format
runtime/references
runtime/rtti
runtime/sizeof
runtime/string