From 587690c32bb8d890bce6ac132734b9fa3c553093 Mon Sep 17 00:00:00 2001 From: Milad Fa Date: Fri, 2 Dec 2022 09:07:49 -0500 Subject: [PATCH] PPC[liftoff]: Implement simd s128 const Change-Id: I7e8efb713a4a2febb5b4800ac91b0c0067dd3582 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/4075050 Commit-Queue: Milad Farazmand Reviewed-by: Junliang Yan Cr-Commit-Position: refs/heads/main@{#84658} --- src/codegen/ppc/macro-assembler-ppc.cc | 7 +++++++ src/codegen/ppc/macro-assembler-ppc.h | 2 ++ src/compiler/backend/ppc/code-generator-ppc.cc | 4 +--- src/wasm/baseline/ppc/liftoff-assembler-ppc.h | 8 +++++++- 4 files changed, 17 insertions(+), 4 deletions(-) diff --git a/src/codegen/ppc/macro-assembler-ppc.cc b/src/codegen/ppc/macro-assembler-ppc.cc index 4b761ccbb6..2d026d6352 100644 --- a/src/codegen/ppc/macro-assembler-ppc.cc +++ b/src/codegen/ppc/macro-assembler-ppc.cc @@ -4516,6 +4516,13 @@ void TurboAssembler::S128Not(Simd128Register dst, Simd128Register src) { vnor(dst, src, src); } +void TurboAssembler::S128Const(Simd128Register dst, uint64_t high, uint64_t low, + Register scratch1, Register scratch2) { + mov(scratch1, Operand(low)); + mov(scratch2, Operand(high)); + mtvsrdd(dst, scratch2, scratch1); +} + void TurboAssembler::S128Select(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register mask) { vsel(dst, src2, src1, mask); diff --git a/src/codegen/ppc/macro-assembler-ppc.h b/src/codegen/ppc/macro-assembler-ppc.h index d2b80f00dd..29bc64ad49 100644 --- a/src/codegen/ppc/macro-assembler-ppc.h +++ b/src/codegen/ppc/macro-assembler-ppc.h @@ -1365,6 +1365,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { Register scratch2, Simd128Register scratch3); void V128AnyTrue(Register dst, Simd128Register src, Register scratch1, Register scratch2, Simd128Register scratch3); + void S128Const(Simd128Register dst, uint64_t high, uint64_t low, + Register scratch1, Register scratch2); void S128Select(Simd128Register dst, Simd128Register src1, Simd128Register src2, Simd128Register mask); diff --git a/src/compiler/backend/ppc/code-generator-ppc.cc b/src/compiler/backend/ppc/code-generator-ppc.cc index 70eb7127e4..f5281d9485 100644 --- a/src/compiler/backend/ppc/code-generator-ppc.cc +++ b/src/compiler/backend/ppc/code-generator-ppc.cc @@ -2544,9 +2544,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( case kPPC_S128Const: { uint64_t low = make_uint64(i.InputUint32(1), i.InputUint32(0)); uint64_t high = make_uint64(i.InputUint32(3), i.InputUint32(2)); - __ mov(r0, Operand(low)); - __ mov(ip, Operand(high)); - __ mtvsrdd(i.OutputSimd128Register(), ip, r0); + __ S128Const(i.OutputSimd128Register(), high, low, r0, ip); break; } case kPPC_S128Zero: { diff --git a/src/wasm/baseline/ppc/liftoff-assembler-ppc.h b/src/wasm/baseline/ppc/liftoff-assembler-ppc.h index a1caeaafd5..c87ecdb8e8 100644 --- a/src/wasm/baseline/ppc/liftoff-assembler-ppc.h +++ b/src/wasm/baseline/ppc/liftoff-assembler-ppc.h @@ -2402,7 +2402,13 @@ void LiftoffAssembler::emit_i8x16_bitmask(LiftoffRegister dst, void LiftoffAssembler::emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) { - bailout(kUnsupportedArchitecture, "emit_s128_const"); + uint64_t vals[2]; + memcpy(vals, imms, sizeof(vals)); +#ifdef V8_TARGET_BIG_ENDIAN + vals[0] = ByteReverse(vals[0]); + vals[1] = ByteReverse(vals[1]); +#endif + S128Const(dst.fp().toSimd(), vals[1], vals[0], r0, ip); } void LiftoffAssembler::emit_s128_select(LiftoffRegister dst,