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S390: Initial impl of turbofan compiler

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R=danno@chromium.org,jkummerow@chromium.org,jochen@chromium.org,joransiu@ca.ibm.com,michael_dawson@ca.ibm.com,mbrandy@us.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1762743002

Cr-Commit-Position: refs/heads/master@{#34501}
This commit is contained in:
jyan 2016-03-04 07:38:18 -08:00 committed by Commit bot
parent 78e23b2b9e
commit 5a9ecc129f
9 changed files with 4002 additions and 0 deletions
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4
BUILD.gn
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@ -1640,6 +1640,10 @@ source_set("v8_base") {
]
} else if (v8_target_arch == "s390" || v8_target_arch == "s390x") {
sources += [
"src/compiler/s390/code-generator-s390.cc",
"src/compiler/s390/instruction-codes-s390.h",
"src/compiler/s390/instruction-scheduler-s390.cc",
"src/compiler/s390/instruction-selector-s390.cc",
"src/debug/s390/debug-s390.cc",
"src/ic/s390/access-compiler-s390.cc",
"src/ic/s390/handler-compiler-s390.cc",

20
src/compiler/c-linkage.cc
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@ -123,6 +123,26 @@ LinkageLocation regloc(Register reg) {
d20.bit() | d21.bit() | d22.bit() | d23.bit() | d24.bit() | d25.bit() | \
d26.bit() | d27.bit() | d28.bit() | d29.bit() | d30.bit() | d31.bit()
#elif V8_TARGET_ARCH_S390X
// ===========================================================================
// == s390x ==================================================================
// ===========================================================================
#define PARAM_REGISTERS r2, r3, r4, r5, r6
#define CALLEE_SAVE_REGISTERS \
r6.bit() | r7.bit() | r8.bit() | r9.bit() | r10.bit() | ip.bit() | r13.bit()
#define CALLEE_SAVE_FP_REGISTERS \
d8.bit() | d9.bit() | d10.bit() | d11.bit() | d12.bit() | d13.bit() | \
d14.bit() | d15.bit()
#elif V8_TARGET_ARCH_S390
// ===========================================================================
// == s390 ===================================================================
// ===========================================================================
#define PARAM_REGISTERS r2, r3, r4, r5, r6
#define CALLEE_SAVE_REGISTERS \
r6.bit() | r7.bit() | r8.bit() | r9.bit() | r10.bit() | ip.bit() | r13.bit()
#define CALLEE_SAVE_FP_REGISTERS (d4.bit() | d6.bit())
#else
// ===========================================================================
// == unknown ================================================================

2
src/compiler/instruction-codes.h
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@ -21,6 +21,8 @@
#include "src/compiler/x64/instruction-codes-x64.h"
#elif V8_TARGET_ARCH_PPC
#include "src/compiler/ppc/instruction-codes-ppc.h"
#elif V8_TARGET_ARCH_S390
#include "src/compiler/s390/instruction-codes-s390.h"
#elif V8_TARGET_ARCH_X87
#include "src/compiler/x87/instruction-codes-x87.h"
#else

1953
src/compiler/s390/code-generator-s390.cc Normal file
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154
src/compiler/s390/instruction-codes-s390.h Normal file
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@ -0,0 +1,154 @@
// Copyright 2015 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#ifndef V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
#define V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_
namespace v8 {
namespace internal {
namespace compiler {
// S390-specific opcodes that specify which assembly sequence to emit.
// Most opcodes specify a single instruction.
#define TARGET_ARCH_OPCODE_LIST(V) \
V(S390_And) \
V(S390_AndComplement) \
V(S390_Or) \
V(S390_OrComplement) \
V(S390_Xor) \
V(S390_ShiftLeft32) \
V(S390_ShiftLeft64) \
V(S390_ShiftRight32) \
V(S390_ShiftRight64) \
V(S390_ShiftRightAlg32) \
V(S390_ShiftRightAlg64) \
V(S390_RotRight32) \
V(S390_RotRight64) \
V(S390_Not) \
V(S390_RotLeftAndMask32) \
V(S390_RotLeftAndClear64) \
V(S390_RotLeftAndClearLeft64) \
V(S390_RotLeftAndClearRight64) \
V(S390_Add) \
V(S390_AddWithOverflow32) \
V(S390_AddFloat) \
V(S390_AddDouble) \
V(S390_Sub) \
V(S390_SubWithOverflow32) \
V(S390_SubFloat) \
V(S390_SubDouble) \
V(S390_Mul32) \
V(S390_Mul64) \
V(S390_MulHigh32) \
V(S390_MulHighU32) \
V(S390_MulFloat) \
V(S390_MulDouble) \
V(S390_Div32) \
V(S390_Div64) \
V(S390_DivU32) \
V(S390_DivU64) \
V(S390_DivFloat) \
V(S390_DivDouble) \
V(S390_Mod32) \
V(S390_Mod64) \
V(S390_ModU32) \
V(S390_ModU64) \
V(S390_ModDouble) \
V(S390_Neg) \
V(S390_NegDouble) \
V(S390_SqrtFloat) \
V(S390_FloorFloat) \
V(S390_CeilFloat) \
V(S390_TruncateFloat) \
V(S390_AbsFloat) \
V(S390_SqrtDouble) \
V(S390_FloorDouble) \
V(S390_CeilDouble) \
V(S390_TruncateDouble) \
V(S390_RoundDouble) \
V(S390_MaxDouble) \
V(S390_MinDouble) \
V(S390_AbsDouble) \
V(S390_Cntlz32) \
V(S390_Cntlz64) \
V(S390_Popcnt32) \
V(S390_Popcnt64) \
V(S390_Cmp32) \
V(S390_Cmp64) \
V(S390_CmpFloat) \
V(S390_CmpDouble) \
V(S390_Tst32) \
V(S390_Tst64) \
V(S390_Push) \
V(S390_PushFrame) \
V(S390_StoreToStackSlot) \
V(S390_ExtendSignWord8) \
V(S390_ExtendSignWord16) \
V(S390_ExtendSignWord32) \
V(S390_Uint32ToUint64) \
V(S390_Int64ToInt32) \
V(S390_Int64ToFloat32) \
V(S390_Int64ToDouble) \
V(S390_Uint64ToFloat32) \
V(S390_Uint64ToDouble) \
V(S390_Int32ToFloat32) \
V(S390_Int32ToDouble) \
V(S390_Uint32ToFloat32) \
V(S390_Uint32ToDouble) \
V(S390_Float32ToInt64) \
V(S390_Float32ToUint64) \
V(S390_Float32ToInt32) \
V(S390_Float32ToUint32) \
V(S390_Float32ToDouble) \
V(S390_DoubleToInt32) \
V(S390_DoubleToUint32) \
V(S390_DoubleToInt64) \
V(S390_DoubleToUint64) \
V(S390_DoubleToFloat32) \
V(S390_DoubleExtractLowWord32) \
V(S390_DoubleExtractHighWord32) \
V(S390_DoubleInsertLowWord32) \
V(S390_DoubleInsertHighWord32) \
V(S390_DoubleConstruct) \
V(S390_BitcastInt32ToFloat32) \
V(S390_BitcastFloat32ToInt32) \
V(S390_BitcastInt64ToDouble) \
V(S390_BitcastDoubleToInt64) \
V(S390_LoadWordS8) \
V(S390_LoadWordU8) \
V(S390_LoadWordS16) \
V(S390_LoadWordU16) \
V(S390_LoadWordS32) \
V(S390_LoadWord64) \
V(S390_LoadFloat32) \
V(S390_LoadDouble) \
V(S390_StoreWord8) \
V(S390_StoreWord16) \
V(S390_StoreWord32) \
V(S390_StoreWord64) \
V(S390_StoreFloat32) \
V(S390_StoreDouble)
// Addressing modes represent the "shape" of inputs to an instruction.
// Many instructions support multiple addressing modes. Addressing modes
// are encoded into the InstructionCode of the instruction and tell the
// code generator after register allocation which assembler method to call.
//
// We use the following local notation for addressing modes:
//
// R = register
// O = register or stack slot
// D = double register
// I = immediate (handle, external, int32)
// MRI = [register + immediate]
// MRR = [register + register]
#define TARGET_ADDRESSING_MODE_LIST(V) \
V(MRI) /* [%r0 + K] */ \
V(MRR) /* [%r0 + %r1] */
} // namespace compiler
} // namespace internal
} // namespace v8
#endif // V8_COMPILER_S390_INSTRUCTION_CODES_S390_H_

157
src/compiler/s390/instruction-scheduler-s390.cc Normal file
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@ -0,0 +1,157 @@
// Copyright 2015 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "src/compiler/instruction-scheduler.h"
namespace v8 {
namespace internal {
namespace compiler {
bool InstructionScheduler::SchedulerSupported() { return true; }
int InstructionScheduler::GetTargetInstructionFlags(
const Instruction* instr) const {
switch (instr->arch_opcode()) {
case kS390_And:
case kS390_AndComplement:
case kS390_Or:
case kS390_OrComplement:
case kS390_Xor:
case kS390_ShiftLeft32:
case kS390_ShiftLeft64:
case kS390_ShiftRight32:
case kS390_ShiftRight64:
case kS390_ShiftRightAlg32:
case kS390_ShiftRightAlg64:
case kS390_RotRight32:
case kS390_RotRight64:
case kS390_Not:
case kS390_RotLeftAndMask32:
case kS390_RotLeftAndClear64:
case kS390_RotLeftAndClearLeft64:
case kS390_RotLeftAndClearRight64:
case kS390_Add:
case kS390_AddWithOverflow32:
case kS390_AddFloat:
case kS390_AddDouble:
case kS390_Sub:
case kS390_SubWithOverflow32:
case kS390_SubFloat:
case kS390_SubDouble:
case kS390_Mul32:
case kS390_Mul64:
case kS390_MulHigh32:
case kS390_MulHighU32:
case kS390_MulFloat:
case kS390_MulDouble:
case kS390_Div32:
case kS390_Div64:
case kS390_DivU32:
case kS390_DivU64:
case kS390_DivFloat:
case kS390_DivDouble:
case kS390_Mod32:
case kS390_Mod64:
case kS390_ModU32:
case kS390_ModU64:
case kS390_ModDouble:
case kS390_Neg:
case kS390_NegDouble:
case kS390_SqrtFloat:
case kS390_FloorFloat:
case kS390_CeilFloat:
case kS390_TruncateFloat:
case kS390_AbsFloat:
case kS390_SqrtDouble:
case kS390_FloorDouble:
case kS390_CeilDouble:
case kS390_TruncateDouble:
case kS390_RoundDouble:
case kS390_MaxDouble:
case kS390_MinDouble:
case kS390_AbsDouble:
case kS390_Cntlz32:
case kS390_Cntlz64:
case kS390_Popcnt32:
case kS390_Popcnt64:
case kS390_Cmp32:
case kS390_Cmp64:
case kS390_CmpFloat:
case kS390_CmpDouble:
case kS390_Tst32:
case kS390_Tst64:
case kS390_ExtendSignWord8:
case kS390_ExtendSignWord16:
case kS390_ExtendSignWord32:
case kS390_Uint32ToUint64:
case kS390_Int64ToInt32:
case kS390_Int64ToFloat32:
case kS390_Int64ToDouble:
case kS390_Uint64ToFloat32:
case kS390_Uint64ToDouble:
case kS390_Int32ToFloat32:
case kS390_Int32ToDouble:
case kS390_Uint32ToFloat32:
case kS390_Uint32ToDouble:
case kS390_Float32ToInt32:
case kS390_Float32ToUint32:
case kS390_Float32ToUint64:
case kS390_Float32ToDouble:
case kS390_DoubleToInt32:
case kS390_DoubleToUint32:
case kS390_Float32ToInt64:
case kS390_DoubleToInt64:
case kS390_DoubleToUint64:
case kS390_DoubleToFloat32:
case kS390_DoubleExtractLowWord32:
case kS390_DoubleExtractHighWord32:
case kS390_DoubleInsertLowWord32:
case kS390_DoubleInsertHighWord32:
case kS390_DoubleConstruct:
case kS390_BitcastInt32ToFloat32:
case kS390_BitcastFloat32ToInt32:
case kS390_BitcastInt64ToDouble:
case kS390_BitcastDoubleToInt64:
return kNoOpcodeFlags;
case kS390_LoadWordS8:
case kS390_LoadWordU8:
case kS390_LoadWordS16:
case kS390_LoadWordU16:
case kS390_LoadWordS32:
case kS390_LoadWord64:
case kS390_LoadFloat32:
case kS390_LoadDouble:
return kIsLoadOperation;
case kS390_StoreWord8:
case kS390_StoreWord16:
case kS390_StoreWord32:
case kS390_StoreWord64:
case kS390_StoreFloat32:
case kS390_StoreDouble:
case kS390_Push:
case kS390_PushFrame:
case kS390_StoreToStackSlot:
return kHasSideEffect;
#define CASE(Name) case k##Name:
COMMON_ARCH_OPCODE_LIST(CASE)
#undef CASE
// Already covered in architecture independent code.
UNREACHABLE();
}
UNREACHABLE();
return kNoOpcodeFlags;
}
int InstructionScheduler::GetInstructionLatency(const Instruction* instr) {
// TODO(all): Add instruction cost modeling.
return 1;
}
} // namespace compiler
} // namespace internal
} // namespace v8

1690
src/compiler/s390/instruction-selector-s390.cc Normal file
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18
src/compiler/wasm-linkage.cc
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@ -125,6 +125,24 @@ LinkageLocation stackloc(int i) {
#define FP_PARAM_REGISTERS d1, d2, d3, d4, d5, d6, d7, d8
#define FP_RETURN_REGISTERS d1, d2
#elif V8_TARGET_ARCH_S390X
// ===========================================================================
// == s390x ==================================================================
// ===========================================================================
#define GP_PARAM_REGISTERS r2, r3, r4, r5, r6
#define GP_RETURN_REGISTERS r2
#define FP_PARAM_REGISTERS d0, d2, d4, d6
#define FP_RETURN_REGISTERS d0, d2, d4, d6
#elif V8_TARGET_ARCH_S390
// ===========================================================================
// == s390 ===================================================================
// ===========================================================================
#define GP_PARAM_REGISTERS r2, r3, r4, r5, r6
#define GP_RETURN_REGISTERS r2, r3
#define FP_PARAM_REGISTERS d0, d2
#define FP_RETURN_REGISTERS d0, d2
#else
// ===========================================================================
// == unknown ================================================================

4
tools/gyp/v8.gyp
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@ -1560,6 +1560,10 @@
}],
['v8_target_arch=="s390" or v8_target_arch=="s390x"', {
'sources': [ ### gcmole(arch:s390) ###
'../../src/compiler/s390/code-generator-s390.cc',
'../../src/compiler/s390/instruction-codes-s390.h',
'../../src/compiler/s390/instruction-scheduler-s390.cc',
'../../src/compiler/s390/instruction-selector-s390.cc',
'../../src/debug/s390/debug-s390.cc',
'../../src/ic/s390/access-compiler-s390.cc',
'../../src/ic/s390/handler-compiler-s390.cc',