MIPS: Add rotate-right instruction to hydrogen and use it instead of bitwise operations of the form ((x >>> i) | (x << (32 - i))).
Port r12855 (be965042) BUG= TEST= Review URL: https://chromiumcodereview.appspot.com/11293140 Patch from Akos Palfi <palfia@homejinni.com>. git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@12971 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
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@ -1148,6 +1148,9 @@ void LCodeGen::DoShiftI(LShiftI* instr) {
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// No need to mask the right operand on MIPS, it is built into the variable
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// shift instructions.
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switch (instr->op()) {
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case Token::ROR:
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__ Ror(result, left, Operand(ToRegister(right_op)));
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break;
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case Token::SAR:
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__ srav(result, left, ToRegister(right_op));
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break;
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@ -1169,6 +1172,13 @@ void LCodeGen::DoShiftI(LShiftI* instr) {
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int value = ToInteger32(LConstantOperand::cast(right_op));
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uint8_t shift_count = static_cast<uint8_t>(value & 0x1F);
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switch (instr->op()) {
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case Token::ROR:
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if (shift_count != 0) {
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__ Ror(result, left, Operand(shift_count));
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} else {
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__ Move(result, left);
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}
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break;
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case Token::SAR:
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if (shift_count != 0) {
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__ sra(result, left, shift_count);
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@ -177,6 +177,7 @@ const char* LArithmeticT::Mnemonic() const {
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case Token::BIT_AND: return "bit-and-t";
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case Token::BIT_OR: return "bit-or-t";
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case Token::BIT_XOR: return "bit-xor-t";
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case Token::ROR: return "ror-t";
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case Token::SHL: return "sll-t";
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case Token::SAR: return "sra-t";
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case Token::SHR: return "srl-t";
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