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MIPS64: Megamorphic KeyedLoadIC needs special handling for vector ics.

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Port 16843e239d

Original commit message:
When --vector-ics is true, we still tail-call to the hand-written
megamorphic KeyedLoadIC (formerly "generic"). Now that this code uses
the megamorphic cache, it needs to deal properly with the vector and
slot registers. Achieve this with a sentinel vectors/slot combo.

BUG=

Review URL: https://codereview.chromium.org/894053002

Cr-Commit-Position: refs/heads/master@{#26384}
This commit is contained in:
balazs.kilvady 2015-02-02 09:50:10 -08:00 committed by Commit bot
parent d166735d0a
commit 6019cbf9df
1 changed files with 15 additions and 1 deletions
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16
src/ic/mips64/ic-mips64.cc
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@ -534,10 +534,24 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) {
__ LoadRoot(at, Heap::kHashTableMapRootIndex);
__ Branch(&probe_dictionary, eq, a4, Operand(at));
if (FLAG_vector_ics) {
// When vector ics are in use, the handlers in the stub cache expect a
// vector and slot. Since we won't change the IC from any downstream
// misses, a dummy vector can be used.
Register vector = VectorLoadICDescriptor::VectorRegister();
Register slot = VectorLoadICDescriptor::SlotRegister();
DCHECK(!AreAliased(vector, slot, a4, a5, a6, t1));
Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast(
masm->isolate()->factory()->keyed_load_dummy_vector());
int int_slot = dummy_vector->GetIndex(FeedbackVectorICSlot(0));
__ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex);
__ li(slot, Operand(Smi::FromInt(int_slot)));
}
Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
Code::ComputeHandlerFlags(Code::LOAD_IC));
masm->isolate()->stub_cache()->GenerateProbe(
masm, Code::LOAD_IC, flags, false, receiver, key, a3, a4, a5, a6);
masm, Code::LOAD_IC, flags, false, receiver, key, a4, a5, a6, t1);
// Cache miss.
GenerateMiss(masm);