MIPS64: Megamorphic KeyedLoadIC needs special handling for vector ics.
Port 16843e239d
Original commit message:
When --vector-ics is true, we still tail-call to the hand-written
megamorphic KeyedLoadIC (formerly "generic"). Now that this code uses
the megamorphic cache, it needs to deal properly with the vector and
slot registers. Achieve this with a sentinel vectors/slot combo.
BUG=
Review URL: https://codereview.chromium.org/894053002
Cr-Commit-Position: refs/heads/master@{#26384}
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@ -534,10 +534,24 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) {
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__ LoadRoot(at, Heap::kHashTableMapRootIndex);
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__ Branch(&probe_dictionary, eq, a4, Operand(at));
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if (FLAG_vector_ics) {
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// When vector ics are in use, the handlers in the stub cache expect a
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// vector and slot. Since we won't change the IC from any downstream
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// misses, a dummy vector can be used.
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Register vector = VectorLoadICDescriptor::VectorRegister();
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Register slot = VectorLoadICDescriptor::SlotRegister();
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DCHECK(!AreAliased(vector, slot, a4, a5, a6, t1));
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Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast(
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masm->isolate()->factory()->keyed_load_dummy_vector());
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int int_slot = dummy_vector->GetIndex(FeedbackVectorICSlot(0));
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__ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex);
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__ li(slot, Operand(Smi::FromInt(int_slot)));
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}
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Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
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Code::ComputeHandlerFlags(Code::LOAD_IC));
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masm->isolate()->stub_cache()->GenerateProbe(
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masm, Code::LOAD_IC, flags, false, receiver, key, a3, a4, a5, a6);
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masm, Code::LOAD_IC, flags, false, receiver, key, a4, a5, a6, t1);
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// Cache miss.
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GenerateMiss(masm);
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