[ia32][x64] Enable CPU feature in Assembler if supported
x64 already had logic to enable a lower CPU extension if a higher level one was supported. Add this to ia32. And also add SSSE3->SSE3 logic. Drive-by cleanup to remove an extra CpuFeatureScope. Bug: v8:11154 Change-Id: I12e3aa990cc07149da213911c624468a39f4e1a3 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3212811 Reviewed-by: Deepti Gandluri <gdeepti@chromium.org> Commit-Queue: Zhi An Ng <zhin@chromium.org> Cr-Commit-Position: refs/heads/main@{#77291}
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@ -324,6 +324,15 @@ Assembler::Assembler(const AssemblerOptions& options,
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std::unique_ptr<AssemblerBuffer> buffer)
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: AssemblerBase(options, std::move(buffer)) {
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reloc_info_writer.Reposition(buffer_start_ + buffer_->size(), pc_);
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if (CpuFeatures::IsSupported(SSE4_2)) {
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EnableCpuFeature(SSE4_1);
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}
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if (CpuFeatures::IsSupported(SSE4_1)) {
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EnableCpuFeature(SSSE3);
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}
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if (CpuFeatures::IsSupported(SSSE3)) {
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EnableCpuFeature(SSE3);
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}
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}
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void Assembler::GetCode(Isolate* isolate, CodeDesc* desc,
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@ -1139,7 +1139,6 @@ void SharedTurboAssembler::S128Load8Splat(XMMRegister dst, Operand src,
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vpshufb(dst, dst, scratch);
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} else {
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CpuFeatureScope ssse4_scope(this, SSE4_1);
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CpuFeatureScope ssse3_scope(this, SSSE3);
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pinsrb(dst, src, uint8_t{0});
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xorps(scratch, scratch);
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pshufb(dst, scratch);
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@ -347,6 +347,9 @@ Assembler::Assembler(const AssemblerOptions& options,
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if (CpuFeatures::IsSupported(SSE4_1)) {
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EnableCpuFeature(SSSE3);
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}
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if (CpuFeatures::IsSupported(SSSE3)) {
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EnableCpuFeature(SSE3);
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}
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#if defined(V8_OS_WIN_X64)
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if (options.collect_win64_unwind_info) {
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