AuroraMiddleware/v8
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PPC: Fix sub instruction

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PPC instr has 16bits to represent an imm, load constant
in register if imm is not in the range [-2^15, 2^15)

R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
Log=N

Bug: 
Change-Id: Id9aa97538b1f93f01d5a297b6256e1b082f06ca1
Reviewed-on: https://chromium-review.googlesource.com/624714
Reviewed-by: Junliang Yan <jyan@ca.ibm.com>
Commit-Queue: Jaideep Bajwa <bjaideep@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#47487}
This commit is contained in:
Jaideep Bajwa 2017-08-21 16:33:01 -04:00 committed by Commit Bot
parent e7af579ff3
commit 614efbd6c4
1 changed files with 9 additions and 2 deletions
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11
src/compiler/ppc/code-generator-ppc.cc
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@ -1354,8 +1354,15 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ sub(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1),
LeaveOE, i.OutputRCBit());
} else {
__ subi(i.OutputRegister(), i.InputRegister(0), i.InputImmediate(1));
DCHECK_EQ(LeaveRC, i.OutputRCBit());
if (is_int16(i.InputImmediate(1).immediate())) {
__ subi(i.OutputRegister(), i.InputRegister(0),
i.InputImmediate(1));
DCHECK_EQ(LeaveRC, i.OutputRCBit());
} else {
__ mov(kScratchReg, i.InputImmediate(1));
__ sub(i.OutputRegister(), i.InputRegister(0), kScratchReg, LeaveOE,
i.OutputRCBit());
}
}
#if V8_TARGET_ARCH_PPC64
}