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S390 [liftoff]: Implement simd FP trunc saturate

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Change-Id: If7a0742b694d3dc475442a6aee3f6c967291eda1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3451360
Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#79020}
This commit is contained in:
Milad Fa 2022-02-09 21:42:49 -05:00 committed by V8 LUCI CQ
parent 0a8fae41fd
commit 61bcc4d1f2
4 changed files with 30 additions and 19 deletions
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20
src/codegen/s390/macro-assembler-s390.cc
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@ -5950,6 +5950,26 @@ void TurboAssembler::I16x8ExtAddPairwiseI8x16U(Simd128Register dst,
}
#undef EXT_ADD_PAIRWISE
void TurboAssembler::I32x4TruncSatF64x2SZero(Simd128Register dst,
Simd128Register src,
Simd128Register scratch) {
// NaN to 0.
vlr(scratch, src, Condition(0), Condition(0), Condition(0));
vfce(scratch, scratch, scratch, Condition(0), Condition(0), Condition(3));
vn(scratch, src, scratch, Condition(0), Condition(0), Condition(0));
vcgd(scratch, scratch, Condition(5), Condition(0), Condition(3));
vx(dst, dst, dst, Condition(0), Condition(0), Condition(2));
vpks(dst, dst, scratch, Condition(0), Condition(3));
}
void TurboAssembler::I32x4TruncSatF64x2UZero(Simd128Register dst,
Simd128Register src,
Simd128Register scratch) {
vclgd(scratch, src, Condition(5), Condition(0), Condition(3));
vx(dst, dst, dst, Condition(0), Condition(0), Condition(2));
vpkls(dst, dst, scratch, Condition(0), Condition(3));
}
// Vector LE Load and Transform instructions.
#ifdef V8_TARGET_BIG_ENDIAN
#define IS_BIG_ENDIAN true

4
src/codegen/s390/macro-assembler-s390.h
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@ -1140,6 +1140,10 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
void F32x4DemoteF64x2Zero(Simd128Register dst, Simd128Register src,
Simd128Register scratch1, Register scratch2,
Register scratch3, Register scratch4);
void I32x4TruncSatF64x2SZero(Simd128Register dst, Simd128Register src,
Simd128Register scratch);
void I32x4TruncSatF64x2UZero(Simd128Register dst, Simd128Register src,
Simd128Register scratch);
void S128Select(Simd128Register dst, Simd128Register src1,
Simd128Register src2, Simd128Register mask);

21
src/compiler/backend/s390/code-generator-s390.cc
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@ -3058,26 +3058,13 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break;
}
case kS390_I32x4TruncSatF64x2SZero: {
Simd128Register src = i.InputSimd128Register(0);
Simd128Register dst = i.OutputSimd128Register();
// NaN to 0
__ vlr(kScratchDoubleReg, src, Condition(0), Condition(0), Condition(0));
__ vfce(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg,
Condition(0), Condition(0), Condition(3));
__ vn(kScratchDoubleReg, src, kScratchDoubleReg, Condition(0),
Condition(0), Condition(0));
__ vcgd(kScratchDoubleReg, kScratchDoubleReg, Condition(5), Condition(0),
Condition(3));
__ vx(dst, dst, dst, Condition(0), Condition(0), Condition(2));
__ vpks(dst, dst, kScratchDoubleReg, Condition(0), Condition(3));
__ I32x4TruncSatF64x2SZero(i.OutputSimd128Register(),
i.InputSimd128Register(0), kScratchDoubleReg);
break;
}
case kS390_I32x4TruncSatF64x2UZero: {
Simd128Register dst = i.OutputSimd128Register();
__ vclgd(kScratchDoubleReg, i.InputSimd128Register(0), Condition(5),
Condition(0), Condition(3));
__ vx(dst, dst, dst, Condition(0), Condition(0), Condition(2));
__ vpkls(dst, dst, kScratchDoubleReg, Condition(0), Condition(3));
__ I32x4TruncSatF64x2UZero(i.OutputSimd128Register(),
i.InputSimd128Register(0), kScratchDoubleReg);
break;
}
#define LOAD_SPLAT(type) \

4
src/wasm/baseline/s390/liftoff-assembler-s390.h
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@ -2723,12 +2723,12 @@ void LiftoffAssembler::emit_i16x8_uconvert_i32x4(LiftoffRegister dst,
void LiftoffAssembler::emit_i32x4_trunc_sat_f64x2_s_zero(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i32x4.trunc_sat_f64x2_s_zero");
I32x4TruncSatF64x2SZero(dst.fp(), src.fp(), kScratchDoubleReg);
}
void LiftoffAssembler::emit_i32x4_trunc_sat_f64x2_u_zero(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i32x4.trunc_sat_f64x2_u_zero");
I32x4TruncSatF64x2UZero(dst.fp(), src.fp(), kScratchDoubleReg);
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {