AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

MIPS: ARM: fix a bug with saving lr register in GenerateSmiToDouble.

Browse Source 
Port r13107 (63aea0a3)

BUG=
TEST=

Review URL: https://codereview.chromium.org/11574013
Patch from Akos Palfi <palfia@homejinni.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13258 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
danno@chromium.org 2012-12-20 17:07:38 +00:00
parent 653a66f527
commit 6323bb3e38
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mips/codegen-mips.cc
View File

@ -246,7 +246,7 @@ void ElementsTransitionGenerator::GenerateSmiToDouble(
HeapObject::kMapOffset, HeapObject::kMapOffset,
a3, a3,
t5, t5,
kRAHasBeenSaved, kRAHasNotBeenSaved,
kDontSaveFPRegs, kDontSaveFPRegs,
OMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET,
OMIT_SMI_CHECK); OMIT_SMI_CHECK);