diff --git a/src/codegen/ppc/constants-ppc.h b/src/codegen/ppc/constants-ppc.h index e0a7b36240..7628a2368d 100644 --- a/src/codegen/ppc/constants-ppc.h +++ b/src/codegen/ppc/constants-ppc.h @@ -2424,7 +2424,9 @@ using Instr = uint32_t; /* Vector Unpack Low Signed Byte */ \ V(vupklsb, VUPKLSB, 0x1000028E) \ /* Vector Unpack High Signed Byte */ \ - V(vupkhsb, VUPKHSB, 0x1000020E) + V(vupkhsb, VUPKHSB, 0x1000020E) \ + /* Vector Population Count Byte */ \ + V(vpopcntb, VPOPCNTB, 0x10000703) #define PPC_VX_OPCODE_UNUSED_LIST(V) \ /* Decimal Add Modulo */ \ @@ -2503,8 +2505,6 @@ using Instr = uint32_t; V(vpmsumh, VPMSUMH, 0x10000448) \ /* Vector Polynomial Multiply-Sum Word */ \ V(vpmsumw, VPMSUMW, 0x10000488) \ - /* Vector Population Count Byte */ \ - V(vpopcntb, VPOPCNTB, 0x10000703) \ /* Vector Population Count Doubleword */ \ V(vpopcntd, VPOPCNTD, 0x100007C3) \ /* Vector Population Count Halfword */ \ diff --git a/src/compiler/backend/ppc/code-generator-ppc.cc b/src/compiler/backend/ppc/code-generator-ppc.cc index 10459f34c1..37c46362ed 100644 --- a/src/compiler/backend/ppc/code-generator-ppc.cc +++ b/src/compiler/backend/ppc/code-generator-ppc.cc @@ -3823,6 +3823,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( __ vinsertd(dst, kScratchSimd128Reg, Operand(lane_number)); break; } + case kPPC_I8x16Popcnt: { + __ vpopcntb(i.OutputSimd128Register(), i.InputSimd128Register(0)); + break; + } case kPPC_StoreCompressTagged: { ASSEMBLE_STORE_INTEGER(StoreTaggedField, StoreTaggedFieldX); break; diff --git a/src/compiler/backend/ppc/instruction-codes-ppc.h b/src/compiler/backend/ppc/instruction-codes-ppc.h index ac9530493e..275098ba75 100644 --- a/src/compiler/backend/ppc/instruction-codes-ppc.h +++ b/src/compiler/backend/ppc/instruction-codes-ppc.h @@ -386,6 +386,7 @@ namespace compiler { V(PPC_I8x16Shuffle) \ V(PPC_I8x16Swizzle) \ V(PPC_I8x16BitMask) \ + V(PPC_I8x16Popcnt) \ V(PPC_I64x2AllTrue) \ V(PPC_I32x4AllTrue) \ V(PPC_I16x8AllTrue) \ diff --git a/src/compiler/backend/ppc/instruction-scheduler-ppc.cc b/src/compiler/backend/ppc/instruction-scheduler-ppc.cc index 341959aeb1..e1b0c66345 100644 --- a/src/compiler/backend/ppc/instruction-scheduler-ppc.cc +++ b/src/compiler/backend/ppc/instruction-scheduler-ppc.cc @@ -309,6 +309,7 @@ int InstructionScheduler::GetTargetInstructionFlags( case kPPC_I8x16Shuffle: case kPPC_I8x16Swizzle: case kPPC_I8x16BitMask: + case kPPC_I8x16Popcnt: case kPPC_I64x2AllTrue: case kPPC_I32x4AllTrue: case kPPC_I16x8AllTrue: diff --git a/src/compiler/backend/ppc/instruction-selector-ppc.cc b/src/compiler/backend/ppc/instruction-selector-ppc.cc index 6ff7431928..3c14d26b82 100644 --- a/src/compiler/backend/ppc/instruction-selector-ppc.cc +++ b/src/compiler/backend/ppc/instruction-selector-ppc.cc @@ -2293,6 +2293,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) { V(I16x8Abs) \ V(I8x16Neg) \ V(I8x16Abs) \ + V(I8x16Popcnt) \ V(I16x8SConvertI8x16Low) \ V(I16x8SConvertI8x16High) \ V(I16x8UConvertI8x16Low) \ @@ -2489,7 +2490,6 @@ void InstructionSelector::VisitS128Const(Node* node) { } } -void InstructionSelector::VisitI8x16Popcnt(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2GtS(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2GeS(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2Abs(Node* node) { UNIMPLEMENTED(); } diff --git a/src/execution/ppc/simulator-ppc.cc b/src/execution/ppc/simulator-ppc.cc index 17116fc4cf..10d20c7d77 100644 --- a/src/execution/ppc/simulator-ppc.cc +++ b/src/execution/ppc/simulator-ppc.cc @@ -4842,6 +4842,17 @@ void Simulator::ExecuteGeneric(Instruction* instr) { break; } #undef VECTOR_ROUNDING_AVERAGE + case VPOPCNTB: { + int t = instr->RTValue(); + int b = instr->RBValue(); + FOR_EACH_LANE(i, uint8_t) { + set_simd_register_by_lane( + t, i, + base::bits::CountPopulation( + get_simd_register_by_lane(b, i))); + } + break; + } #undef FOR_EACH_LANE #undef DECODE_VX_INSTRUCTION #undef GET_ADDRESS