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[riscv64] Fix decode error of neg instruction.

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The disassembler cannot decode neg instruction correctly because a single
quote is missed.

Bug: v8:11833
Change-Id: I43f12e8e8e3f1e51244dc891e9bfb611a95f393b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2934617
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Brice Dobry <brice.dobry@futurewei.com>
Reviewed-by: Ji Qiu <qiuji@iscas.ac.cn>
Commit-Queue: Brice Dobry <brice.dobry@futurewei.com>
Cr-Commit-Position: refs/heads/master@{#75046}
This commit is contained in:
Zheng Liu 2021-06-04 15:15:03 -04:00 committed by V8 LUCI CQ
parent 9eebd147c0
commit 6ac9c652fa
3 changed files with 3 additions and 2 deletions
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1
AUTHORS
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@ -248,6 +248,7 @@ Yuri Iozzelli <yuri@leaningtech.com>
Zac Hansen <xaxxon@gmail.com>
Zeynep Cankara <zeynepcankara402@gmail.com>
Zhao Jiazhong <kyslie3100@gmail.com>
Zheng Liu <i6122f@gmail.com>
Zhongping Wang <kewpie.w.zp@gmail.com>
柳荣一 <admin@web-tinker.com>
Tianping Yang <yangtianping@oppo.com>

2
src/diagnostics/riscv64/disasm-riscv64.cc
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@ -764,7 +764,7 @@ void Decoder::DecodeRType(Instruction* instr) {
break;
case RO_SUB:
if (instr->Rs1Value() == zero_reg.code())
Format(instr, "neg 'rd, rs2");
Format(instr, "neg 'rd, 'rs2");
else
Format(instr, "sub 'rd, 'rs1, 'rs2");
break;

2
test/cctest/test-disasm-riscv64.cc
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@ -410,7 +410,7 @@ TEST(PSEUDO) {
COMPARE(RV_li(t6, -12), "ff400f93 li t6, -12");
COMPARE(mv(t0, a4), "00070293 mv t0, a4");
COMPARE(not_(t0, a5), "fff7c293 not t0, a5");
COMPARE(neg(ra, a6), "410000b3 neg ra, rs2");
COMPARE(neg(ra, a6), "410000b3 neg ra, a6");
COMPARE(negw(t2, fp), "408003bb negw t2, fp");
COMPARE(sext_w(t0, s1), "0004829b sext.w t0, s1");
COMPARE(seqz(sp, s2), "00193113 seqz sp, s2");