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[mips][wasm-simd] Implement rounding average

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port cb4ff11 https://crrev.com/c/1958051

Change-Id: I76a6af23264d4d8f08d5a8fb8cda7da206baeeea
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1990924
Auto-Submit: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65673}
This commit is contained in:
Zhao Jiazhong 2020-01-08 03:26:04 -05:00 committed by Commit Bot
parent 0445fa2971
commit 6bef631d75
8 changed files with 194 additions and 158 deletions
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12
src/compiler/backend/mips/code-generator-mips.cc
View File

@ -2470,6 +2470,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
i.InputSimd128Register(0));
break;
}
case kMipsI16x8RoundingAverageU: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ aver_u_h(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kMipsI8x16Splat: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ fill_b(i.OutputSimd128Register(), i.InputRegister(0));
@ -2625,6 +2631,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
i.InputSimd128Register(0));
break;
}
case kMipsI8x16RoundingAverageU: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ aver_u_b(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kMipsS128And: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ and_v(i.OutputSimd128Register(), i.InputSimd128Register(0),

2
src/compiler/backend/mips/instruction-codes-mips.h
View File

@ -228,6 +228,7 @@ namespace compiler {
V(MipsI16x8MinU) \
V(MipsI16x8GtU) \
V(MipsI16x8GeU) \
V(MipsI16x8RoundingAverageU) \
V(MipsI8x16Splat) \
V(MipsI8x16ExtractLaneU) \
V(MipsI8x16ExtractLaneS) \
@ -253,6 +254,7 @@ namespace compiler {
V(MipsI8x16MinU) \
V(MipsI8x16GtU) \
V(MipsI8x16GeU) \
V(MipsI8x16RoundingAverageU) \
V(MipsS128And) \
V(MipsS128Or) \
V(MipsS128Xor) \

2
src/compiler/backend/mips/instruction-scheduler-mips.cc
View File

@ -112,6 +112,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kMipsI16x8ExtractLaneS:
case kMipsI16x8GeS:
case kMipsI16x8GeU:
case kMipsI16x8RoundingAverageU:
case kMipsI16x8GtS:
case kMipsI16x8GtU:
case kMipsI16x8MaxS:
@ -170,6 +171,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kMipsI8x16ExtractLaneS:
case kMipsI8x16GeS:
case kMipsI8x16GeU:
case kMipsI8x16RoundingAverageU:
case kMipsI8x16GtS:
case kMipsI8x16GtU:
case kMipsI8x16MaxS:

160
src/compiler/backend/mips/instruction-selector-mips.cc
View File

@ -2076,85 +2076,87 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
V(I8x16ShrS) \
V(I8x16ShrU)
#define SIMD_BINOP_LIST(V) \
V(F64x2Add, kMipsF64x2Add) \
V(F64x2Sub, kMipsF64x2Sub) \
V(F64x2Mul, kMipsF64x2Mul) \
V(F64x2Div, kMipsF64x2Div) \
V(F64x2Min, kMipsF64x2Min) \
V(F64x2Max, kMipsF64x2Max) \
V(F64x2Eq, kMipsF64x2Eq) \
V(F64x2Ne, kMipsF64x2Ne) \
V(F64x2Lt, kMipsF64x2Lt) \
V(F64x2Le, kMipsF64x2Le) \
V(I64x2Add, kMipsI64x2Add) \
V(I64x2Sub, kMipsI64x2Sub) \
V(F32x4Add, kMipsF32x4Add) \
V(F32x4AddHoriz, kMipsF32x4AddHoriz) \
V(F32x4Sub, kMipsF32x4Sub) \
V(F32x4Mul, kMipsF32x4Mul) \
V(F32x4Div, kMipsF32x4Div) \
V(F32x4Max, kMipsF32x4Max) \
V(F32x4Min, kMipsF32x4Min) \
V(F32x4Eq, kMipsF32x4Eq) \
V(F32x4Ne, kMipsF32x4Ne) \
V(F32x4Lt, kMipsF32x4Lt) \
V(F32x4Le, kMipsF32x4Le) \
V(I32x4Add, kMipsI32x4Add) \
V(I32x4AddHoriz, kMipsI32x4AddHoriz) \
V(I32x4Sub, kMipsI32x4Sub) \
V(I32x4Mul, kMipsI32x4Mul) \
V(I32x4MaxS, kMipsI32x4MaxS) \
V(I32x4MinS, kMipsI32x4MinS) \
V(I32x4MaxU, kMipsI32x4MaxU) \
V(I32x4MinU, kMipsI32x4MinU) \
V(I32x4Eq, kMipsI32x4Eq) \
V(I32x4Ne, kMipsI32x4Ne) \
V(I32x4GtS, kMipsI32x4GtS) \
V(I32x4GeS, kMipsI32x4GeS) \
V(I32x4GtU, kMipsI32x4GtU) \
V(I32x4GeU, kMipsI32x4GeU) \
V(I16x8Add, kMipsI16x8Add) \
V(I16x8AddSaturateS, kMipsI16x8AddSaturateS) \
V(I16x8AddSaturateU, kMipsI16x8AddSaturateU) \
V(I16x8AddHoriz, kMipsI16x8AddHoriz) \
V(I16x8Sub, kMipsI16x8Sub) \
V(I16x8SubSaturateS, kMipsI16x8SubSaturateS) \
V(I16x8SubSaturateU, kMipsI16x8SubSaturateU) \
V(I16x8Mul, kMipsI16x8Mul) \
V(I16x8MaxS, kMipsI16x8MaxS) \
V(I16x8MinS, kMipsI16x8MinS) \
V(I16x8MaxU, kMipsI16x8MaxU) \
V(I16x8MinU, kMipsI16x8MinU) \
V(I16x8Eq, kMipsI16x8Eq) \
V(I16x8Ne, kMipsI16x8Ne) \
V(I16x8GtS, kMipsI16x8GtS) \
V(I16x8GeS, kMipsI16x8GeS) \
V(I16x8GtU, kMipsI16x8GtU) \
V(I16x8GeU, kMipsI16x8GeU) \
V(I16x8SConvertI32x4, kMipsI16x8SConvertI32x4) \
V(I16x8UConvertI32x4, kMipsI16x8UConvertI32x4) \
V(I8x16Add, kMipsI8x16Add) \
V(I8x16AddSaturateS, kMipsI8x16AddSaturateS) \
V(I8x16AddSaturateU, kMipsI8x16AddSaturateU) \
V(I8x16Sub, kMipsI8x16Sub) \
V(I8x16SubSaturateS, kMipsI8x16SubSaturateS) \
V(I8x16SubSaturateU, kMipsI8x16SubSaturateU) \
V(I8x16Mul, kMipsI8x16Mul) \
V(I8x16MaxS, kMipsI8x16MaxS) \
V(I8x16MinS, kMipsI8x16MinS) \
V(I8x16MaxU, kMipsI8x16MaxU) \
V(I8x16MinU, kMipsI8x16MinU) \
V(I8x16Eq, kMipsI8x16Eq) \
V(I8x16Ne, kMipsI8x16Ne) \
V(I8x16GtS, kMipsI8x16GtS) \
V(I8x16GeS, kMipsI8x16GeS) \
V(I8x16GtU, kMipsI8x16GtU) \
V(I8x16GeU, kMipsI8x16GeU) \
V(I8x16SConvertI16x8, kMipsI8x16SConvertI16x8) \
V(I8x16UConvertI16x8, kMipsI8x16UConvertI16x8) \
V(S128And, kMipsS128And) \
V(S128Or, kMipsS128Or) \
#define SIMD_BINOP_LIST(V) \
V(F64x2Add, kMipsF64x2Add) \
V(F64x2Sub, kMipsF64x2Sub) \
V(F64x2Mul, kMipsF64x2Mul) \
V(F64x2Div, kMipsF64x2Div) \
V(F64x2Min, kMipsF64x2Min) \
V(F64x2Max, kMipsF64x2Max) \
V(F64x2Eq, kMipsF64x2Eq) \
V(F64x2Ne, kMipsF64x2Ne) \
V(F64x2Lt, kMipsF64x2Lt) \
V(F64x2Le, kMipsF64x2Le) \
V(I64x2Add, kMipsI64x2Add) \
V(I64x2Sub, kMipsI64x2Sub) \
V(F32x4Add, kMipsF32x4Add) \
V(F32x4AddHoriz, kMipsF32x4AddHoriz) \
V(F32x4Sub, kMipsF32x4Sub) \
V(F32x4Mul, kMipsF32x4Mul) \
V(F32x4Div, kMipsF32x4Div) \
V(F32x4Max, kMipsF32x4Max) \
V(F32x4Min, kMipsF32x4Min) \
V(F32x4Eq, kMipsF32x4Eq) \
V(F32x4Ne, kMipsF32x4Ne) \
V(F32x4Lt, kMipsF32x4Lt) \
V(F32x4Le, kMipsF32x4Le) \
V(I32x4Add, kMipsI32x4Add) \
V(I32x4AddHoriz, kMipsI32x4AddHoriz) \
V(I32x4Sub, kMipsI32x4Sub) \
V(I32x4Mul, kMipsI32x4Mul) \
V(I32x4MaxS, kMipsI32x4MaxS) \
V(I32x4MinS, kMipsI32x4MinS) \
V(I32x4MaxU, kMipsI32x4MaxU) \
V(I32x4MinU, kMipsI32x4MinU) \
V(I32x4Eq, kMipsI32x4Eq) \
V(I32x4Ne, kMipsI32x4Ne) \
V(I32x4GtS, kMipsI32x4GtS) \
V(I32x4GeS, kMipsI32x4GeS) \
V(I32x4GtU, kMipsI32x4GtU) \
V(I32x4GeU, kMipsI32x4GeU) \
V(I16x8Add, kMipsI16x8Add) \
V(I16x8AddSaturateS, kMipsI16x8AddSaturateS) \
V(I16x8AddSaturateU, kMipsI16x8AddSaturateU) \
V(I16x8AddHoriz, kMipsI16x8AddHoriz) \
V(I16x8Sub, kMipsI16x8Sub) \
V(I16x8SubSaturateS, kMipsI16x8SubSaturateS) \
V(I16x8SubSaturateU, kMipsI16x8SubSaturateU) \
V(I16x8Mul, kMipsI16x8Mul) \
V(I16x8MaxS, kMipsI16x8MaxS) \
V(I16x8MinS, kMipsI16x8MinS) \
V(I16x8MaxU, kMipsI16x8MaxU) \
V(I16x8MinU, kMipsI16x8MinU) \
V(I16x8Eq, kMipsI16x8Eq) \
V(I16x8Ne, kMipsI16x8Ne) \
V(I16x8GtS, kMipsI16x8GtS) \
V(I16x8GeS, kMipsI16x8GeS) \
V(I16x8GtU, kMipsI16x8GtU) \
V(I16x8GeU, kMipsI16x8GeU) \
V(I16x8SConvertI32x4, kMipsI16x8SConvertI32x4) \
V(I16x8UConvertI32x4, kMipsI16x8UConvertI32x4) \
V(I16x8RoundingAverageU, kMipsI16x8RoundingAverageU) \
V(I8x16Add, kMipsI8x16Add) \
V(I8x16AddSaturateS, kMipsI8x16AddSaturateS) \
V(I8x16AddSaturateU, kMipsI8x16AddSaturateU) \
V(I8x16Sub, kMipsI8x16Sub) \
V(I8x16SubSaturateS, kMipsI8x16SubSaturateS) \
V(I8x16SubSaturateU, kMipsI8x16SubSaturateU) \
V(I8x16Mul, kMipsI8x16Mul) \
V(I8x16MaxS, kMipsI8x16MaxS) \
V(I8x16MinS, kMipsI8x16MinS) \
V(I8x16MaxU, kMipsI8x16MaxU) \
V(I8x16MinU, kMipsI8x16MinU) \
V(I8x16Eq, kMipsI8x16Eq) \
V(I8x16Ne, kMipsI8x16Ne) \
V(I8x16GtS, kMipsI8x16GtS) \
V(I8x16GeS, kMipsI8x16GeS) \
V(I8x16GtU, kMipsI8x16GtU) \
V(I8x16GeU, kMipsI8x16GeU) \
V(I8x16RoundingAverageU, kMipsI8x16RoundingAverageU) \
V(I8x16SConvertI16x8, kMipsI8x16SConvertI16x8) \
V(I8x16UConvertI16x8, kMipsI8x16UConvertI16x8) \
V(S128And, kMipsS128And) \
V(S128Or, kMipsS128Or) \
V(S128Xor, kMipsS128Xor)
void InstructionSelector::VisitS128Zero(Node* node) {

12
src/compiler/backend/mips64/code-generator-mips64.cc
View File

@ -2556,6 +2556,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
i.InputSimd128Register(0));
break;
}
case kMips64I16x8RoundingAverageU: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ aver_u_h(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kMips64I8x16Splat: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ fill_b(i.OutputSimd128Register(), i.InputRegister(0));
@ -2711,6 +2717,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
i.InputSimd128Register(0));
break;
}
case kMips64I8x16RoundingAverageU: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ aver_u_b(i.OutputSimd128Register(), i.InputSimd128Register(1),
i.InputSimd128Register(0));
break;
}
case kMips64S128And: {
CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
__ and_v(i.OutputSimd128Register(), i.InputSimd128Register(0),

2
src/compiler/backend/mips64/instruction-codes-mips64.h
View File

@ -258,6 +258,7 @@ namespace compiler {
V(Mips64I16x8MinU) \
V(Mips64I16x8GtU) \
V(Mips64I16x8GeU) \
V(Mips64I16x8RoundingAverageU) \
V(Mips64I8x16Splat) \
V(Mips64I8x16ExtractLaneU) \
V(Mips64I8x16ExtractLaneS) \
@ -283,6 +284,7 @@ namespace compiler {
V(Mips64I8x16MinU) \
V(Mips64I8x16GtU) \
V(Mips64I8x16GeU) \
V(Mips64I8x16RoundingAverageU) \
V(Mips64S128And) \
V(Mips64S128Or) \
V(Mips64S128Xor) \

2
src/compiler/backend/mips64/instruction-scheduler-mips64.cc
View File

@ -165,6 +165,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kMips64I16x8UConvertI32x4:
case kMips64I16x8UConvertI8x16High:
case kMips64I16x8UConvertI8x16Low:
case kMips64I16x8RoundingAverageU:
case kMips64I32x4Add:
case kMips64I32x4AddHoriz:
case kMips64I32x4Eq:
@ -217,6 +218,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kMips64I8x16Sub:
case kMips64I8x16SubSaturateS:
case kMips64I8x16SubSaturateU:
case kMips64I8x16RoundingAverageU:
case kMips64Ins:
case kMips64Lsa:
case kMips64MaxD:

160
src/compiler/backend/mips64/instruction-selector-mips64.cc
View File

@ -2743,85 +2743,87 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
V(I8x16ShrS) \
V(I8x16ShrU)
#define SIMD_BINOP_LIST(V) \
V(F64x2Add, kMips64F64x2Add) \
V(F64x2Sub, kMips64F64x2Sub) \
V(F64x2Mul, kMips64F64x2Mul) \
V(F64x2Div, kMips64F64x2Div) \
V(F64x2Min, kMips64F64x2Min) \
V(F64x2Max, kMips64F64x2Max) \
V(F64x2Eq, kMips64F64x2Eq) \
V(F64x2Ne, kMips64F64x2Ne) \
V(F64x2Lt, kMips64F64x2Lt) \
V(F64x2Le, kMips64F64x2Le) \
V(I64x2Add, kMips64I64x2Add) \
V(I64x2Sub, kMips64I64x2Sub) \
V(F32x4Add, kMips64F32x4Add) \
V(F32x4AddHoriz, kMips64F32x4AddHoriz) \
V(F32x4Sub, kMips64F32x4Sub) \
V(F32x4Mul, kMips64F32x4Mul) \
V(F32x4Div, kMips64F32x4Div) \
V(F32x4Max, kMips64F32x4Max) \
V(F32x4Min, kMips64F32x4Min) \
V(F32x4Eq, kMips64F32x4Eq) \
V(F32x4Ne, kMips64F32x4Ne) \
V(F32x4Lt, kMips64F32x4Lt) \
V(F32x4Le, kMips64F32x4Le) \
V(I32x4Add, kMips64I32x4Add) \
V(I32x4AddHoriz, kMips64I32x4AddHoriz) \
V(I32x4Sub, kMips64I32x4Sub) \
V(I32x4Mul, kMips64I32x4Mul) \
V(I32x4MaxS, kMips64I32x4MaxS) \
V(I32x4MinS, kMips64I32x4MinS) \
V(I32x4MaxU, kMips64I32x4MaxU) \
V(I32x4MinU, kMips64I32x4MinU) \
V(I32x4Eq, kMips64I32x4Eq) \
V(I32x4Ne, kMips64I32x4Ne) \
V(I32x4GtS, kMips64I32x4GtS) \
V(I32x4GeS, kMips64I32x4GeS) \
V(I32x4GtU, kMips64I32x4GtU) \
V(I32x4GeU, kMips64I32x4GeU) \
V(I16x8Add, kMips64I16x8Add) \
V(I16x8AddSaturateS, kMips64I16x8AddSaturateS) \
V(I16x8AddSaturateU, kMips64I16x8AddSaturateU) \
V(I16x8AddHoriz, kMips64I16x8AddHoriz) \
V(I16x8Sub, kMips64I16x8Sub) \
V(I16x8SubSaturateS, kMips64I16x8SubSaturateS) \
V(I16x8SubSaturateU, kMips64I16x8SubSaturateU) \
V(I16x8Mul, kMips64I16x8Mul) \
V(I16x8MaxS, kMips64I16x8MaxS) \
V(I16x8MinS, kMips64I16x8MinS) \
V(I16x8MaxU, kMips64I16x8MaxU) \
V(I16x8MinU, kMips64I16x8MinU) \
V(I16x8Eq, kMips64I16x8Eq) \
V(I16x8Ne, kMips64I16x8Ne) \
V(I16x8GtS, kMips64I16x8GtS) \
V(I16x8GeS, kMips64I16x8GeS) \
V(I16x8GtU, kMips64I16x8GtU) \
V(I16x8GeU, kMips64I16x8GeU) \
V(I16x8SConvertI32x4, kMips64I16x8SConvertI32x4) \
V(I16x8UConvertI32x4, kMips64I16x8UConvertI32x4) \
V(I8x16Add, kMips64I8x16Add) \
V(I8x16AddSaturateS, kMips64I8x16AddSaturateS) \
V(I8x16AddSaturateU, kMips64I8x16AddSaturateU) \
V(I8x16Sub, kMips64I8x16Sub) \
V(I8x16SubSaturateS, kMips64I8x16SubSaturateS) \
V(I8x16SubSaturateU, kMips64I8x16SubSaturateU) \
V(I8x16Mul, kMips64I8x16Mul) \
V(I8x16MaxS, kMips64I8x16MaxS) \
V(I8x16MinS, kMips64I8x16MinS) \
V(I8x16MaxU, kMips64I8x16MaxU) \
V(I8x16MinU, kMips64I8x16MinU) \
V(I8x16Eq, kMips64I8x16Eq) \
V(I8x16Ne, kMips64I8x16Ne) \
V(I8x16GtS, kMips64I8x16GtS) \
V(I8x16GeS, kMips64I8x16GeS) \
V(I8x16GtU, kMips64I8x16GtU) \
V(I8x16GeU, kMips64I8x16GeU) \
V(I8x16SConvertI16x8, kMips64I8x16SConvertI16x8) \
V(I8x16UConvertI16x8, kMips64I8x16UConvertI16x8) \
V(S128And, kMips64S128And) \
V(S128Or, kMips64S128Or) \
#define SIMD_BINOP_LIST(V) \
V(F64x2Add, kMips64F64x2Add) \
V(F64x2Sub, kMips64F64x2Sub) \
V(F64x2Mul, kMips64F64x2Mul) \
V(F64x2Div, kMips64F64x2Div) \
V(F64x2Min, kMips64F64x2Min) \
V(F64x2Max, kMips64F64x2Max) \
V(F64x2Eq, kMips64F64x2Eq) \
V(F64x2Ne, kMips64F64x2Ne) \
V(F64x2Lt, kMips64F64x2Lt) \
V(F64x2Le, kMips64F64x2Le) \
V(I64x2Add, kMips64I64x2Add) \
V(I64x2Sub, kMips64I64x2Sub) \
V(F32x4Add, kMips64F32x4Add) \
V(F32x4AddHoriz, kMips64F32x4AddHoriz) \
V(F32x4Sub, kMips64F32x4Sub) \
V(F32x4Mul, kMips64F32x4Mul) \
V(F32x4Div, kMips64F32x4Div) \
V(F32x4Max, kMips64F32x4Max) \
V(F32x4Min, kMips64F32x4Min) \
V(F32x4Eq, kMips64F32x4Eq) \
V(F32x4Ne, kMips64F32x4Ne) \
V(F32x4Lt, kMips64F32x4Lt) \
V(F32x4Le, kMips64F32x4Le) \
V(I32x4Add, kMips64I32x4Add) \
V(I32x4AddHoriz, kMips64I32x4AddHoriz) \
V(I32x4Sub, kMips64I32x4Sub) \
V(I32x4Mul, kMips64I32x4Mul) \
V(I32x4MaxS, kMips64I32x4MaxS) \
V(I32x4MinS, kMips64I32x4MinS) \
V(I32x4MaxU, kMips64I32x4MaxU) \
V(I32x4MinU, kMips64I32x4MinU) \
V(I32x4Eq, kMips64I32x4Eq) \
V(I32x4Ne, kMips64I32x4Ne) \
V(I32x4GtS, kMips64I32x4GtS) \
V(I32x4GeS, kMips64I32x4GeS) \
V(I32x4GtU, kMips64I32x4GtU) \
V(I32x4GeU, kMips64I32x4GeU) \
V(I16x8Add, kMips64I16x8Add) \
V(I16x8AddSaturateS, kMips64I16x8AddSaturateS) \
V(I16x8AddSaturateU, kMips64I16x8AddSaturateU) \
V(I16x8AddHoriz, kMips64I16x8AddHoriz) \
V(I16x8Sub, kMips64I16x8Sub) \
V(I16x8SubSaturateS, kMips64I16x8SubSaturateS) \
V(I16x8SubSaturateU, kMips64I16x8SubSaturateU) \
V(I16x8Mul, kMips64I16x8Mul) \
V(I16x8MaxS, kMips64I16x8MaxS) \
V(I16x8MinS, kMips64I16x8MinS) \
V(I16x8MaxU, kMips64I16x8MaxU) \
V(I16x8MinU, kMips64I16x8MinU) \
V(I16x8Eq, kMips64I16x8Eq) \
V(I16x8Ne, kMips64I16x8Ne) \
V(I16x8GtS, kMips64I16x8GtS) \
V(I16x8GeS, kMips64I16x8GeS) \
V(I16x8GtU, kMips64I16x8GtU) \
V(I16x8GeU, kMips64I16x8GeU) \
V(I16x8RoundingAverageU, kMips64I16x8RoundingAverageU) \
V(I16x8SConvertI32x4, kMips64I16x8SConvertI32x4) \
V(I16x8UConvertI32x4, kMips64I16x8UConvertI32x4) \
V(I8x16Add, kMips64I8x16Add) \
V(I8x16AddSaturateS, kMips64I8x16AddSaturateS) \
V(I8x16AddSaturateU, kMips64I8x16AddSaturateU) \
V(I8x16Sub, kMips64I8x16Sub) \
V(I8x16SubSaturateS, kMips64I8x16SubSaturateS) \
V(I8x16SubSaturateU, kMips64I8x16SubSaturateU) \
V(I8x16Mul, kMips64I8x16Mul) \
V(I8x16MaxS, kMips64I8x16MaxS) \
V(I8x16MinS, kMips64I8x16MinS) \
V(I8x16MaxU, kMips64I8x16MaxU) \
V(I8x16MinU, kMips64I8x16MinU) \
V(I8x16Eq, kMips64I8x16Eq) \
V(I8x16Ne, kMips64I8x16Ne) \
V(I8x16GtS, kMips64I8x16GtS) \
V(I8x16GeS, kMips64I8x16GeS) \
V(I8x16GtU, kMips64I8x16GtU) \
V(I8x16GeU, kMips64I8x16GeU) \
V(I8x16RoundingAverageU, kMips64I8x16RoundingAverageU) \
V(I8x16SConvertI16x8, kMips64I8x16SConvertI16x8) \
V(I8x16UConvertI16x8, kMips64I8x16UConvertI16x8) \
V(S128And, kMips64S128And) \
V(S128Or, kMips64S128Or) \
V(S128Xor, kMips64S128Xor)
void InstructionSelector::VisitS128Zero(Node* node) {