compiler/arm64: change nops to use EmitIdentity
This affects VisitChangeUint32ToUint64 and VisitTruncateInt64ToInt32. The geometric mean of changes across octane, ares6-1.0.1, jetstream2, and web-tooling-0.5.3, was an improvement of 1.2% when running on a Cortex-A53. Change-Id: Ib551641fb78ce4060100129e12f23cd02b0b3b27 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1669690 Reviewed-by: Sigurd Schneider <sigurds@chromium.org> Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Reviewed-by: Jaroslav Sevcik <jarin@chromium.org> Commit-Queue: Sigurd Schneider <sigurds@chromium.org> Cr-Commit-Position: refs/heads/master@{#62327}
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@ -1599,7 +1599,7 @@ void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
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// 32-bit operations will write their result in a W register (implicitly
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// clearing the top 32-bit of the corresponding X register) so the
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// zero-extension is a no-op.
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Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(value));
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EmitIdentity(node);
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return;
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}
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case IrOpcode::kLoad: {
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@ -1610,7 +1610,7 @@ void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
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case MachineRepresentation::kWord8:
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case MachineRepresentation::kWord16:
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case MachineRepresentation::kWord32:
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Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(value));
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EmitIdentity(node);
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return;
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default:
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break;
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@ -1665,10 +1665,9 @@ void InstructionSelector::VisitChangeCompressedSignedToTaggedSigned(
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void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) {
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Arm64OperandGenerator g(this);
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Node* value = node->InputAt(0);
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// The top 32 bits in the 64-bit register will be undefined, and
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// must not be used by a dependent node.
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Emit(kArchNop, g.DefineSameAsFirst(node), g.UseRegister(value));
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EmitIdentity(node);
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}
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void InstructionSelector::VisitFloat64Mod(Node* node) {
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