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[x64] add disasm for two fp instructions

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BUG=
R=yangguo@chromium.org

Review URL: https://codereview.chromium.org/146583002

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@19022 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
yangguo@chromium.org 2014-02-03 08:13:12 +00:00
parent b662597609
commit 6f95c0b11b
3 changed files with 7 additions and 0 deletions
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3
src/x64/disasm-x64.cc
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@ -934,6 +934,7 @@ int DisassemblerX64::RegisterFPUInstruction(int escape_opcode,
case 0xF5: mnem = "fprem1"; break;
case 0xF7: mnem = "fincstp"; break;
case 0xF8: mnem = "fprem"; break;
case 0xFC: mnem = "frndint"; break;
case 0xFD: mnem = "fscale"; break;
case 0xFE: mnem = "fsin"; break;
case 0xFF: mnem = "fcos"; break;
@ -956,6 +957,8 @@ int DisassemblerX64::RegisterFPUInstruction(int escape_opcode,
has_register = true;
} else if (modrm_byte == 0xE2) {
mnem = "fclex";
} else if (modrm_byte == 0xE3) {
mnem = "fninit";
} else {
UnimplementedInstruction();
}

2
test/cctest/test-disasm-ia32.cc
View File

@ -349,6 +349,8 @@ TEST(DisasmIa320) {
__ fdivp(3);
__ fcompp();
__ fwait();
__ frndint();
__ fninit();
__ nop();
// SSE instruction

2
test/cctest/test-disasm-x64.cc
View File

@ -330,6 +330,8 @@ TEST(DisasmX64) {
__ fdivp(3);
__ fcompp();
__ fwait();
__ frndint();
__ fninit();
__ nop();
// SSE instruction