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[riscv64] Fix emit_u32_to_uintptr to be zero-extended

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Change-Id: I95a5768af19174275e2828136ce3ff772886e84f
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3585499
Reviewed-by: ji qiu <qiuji@iscas.ac.cn>
Commit-Queue: Yahan Lu <yahan@iscas.ac.cn>
Auto-Submit: Yahan Lu <yahan@iscas.ac.cn>
Cr-Commit-Position: refs/heads/main@{#79979}
This commit is contained in:
Lu Yahan 2022-04-14 13:33:24 +08:00 committed by Yahan Lu
parent 70caf337c3
commit 720329fc5a
1 changed files with 1 additions and 1 deletions
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src/wasm/baseline/riscv64/liftoff-assembler-riscv64.h
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@ -1351,7 +1351,7 @@ void LiftoffAssembler::emit_i64_addi(LiftoffRegister dst, LiftoffRegister lhs,
TurboAssembler::Add64(dst.gp(), lhs.gp(), Operand(imm));
}
void LiftoffAssembler::emit_u32_to_uintptr(Register dst, Register src) {
addw(dst, src, zero_reg);
ZeroExtendWord(dst, src);
}
void LiftoffAssembler::emit_f32_neg(DoubleRegister dst, DoubleRegister src) {