[mips][wasm-simd] Implement integer absolute
Port 34f9bcdb82
https://crrev.com/c/2067845
Original Commit Message:
Implements i8x16.abs, i16x8.abs, and i32x4.abs.
Change-Id: I95800caa298860326e3deadea2fce71640ae0227
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2086532
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66601}
This commit is contained in:
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8f965daaf8
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@ -2436,6 +2436,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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i.InputSimd128Register(0));
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break;
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}
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case kMipsI32x4Abs: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ asub_s_w(i.OutputSimd128Register(), i.InputSimd128Register(0),
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kSimd128RegZero);
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break;
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}
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case kMipsI16x8Splat: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ fill_h(i.OutputSimd128Register(), i.InputRegister(0));
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@ -2597,6 +2603,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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i.InputSimd128Register(0));
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break;
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}
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case kMipsI16x8Abs: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ asub_s_h(i.OutputSimd128Register(), i.InputSimd128Register(0),
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kSimd128RegZero);
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break;
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}
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case kMipsI8x16Splat: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ fill_b(i.OutputSimd128Register(), i.InputRegister(0));
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@ -2758,6 +2770,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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i.InputSimd128Register(0));
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break;
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}
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case kMipsI8x16Abs: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ asub_s_b(i.OutputSimd128Register(), i.InputSimd128Register(0),
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kSimd128RegZero);
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break;
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}
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case kMipsS128And: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ and_v(i.OutputSimd128Register(), i.InputSimd128Register(0),
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@ -203,6 +203,7 @@ namespace compiler {
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V(MipsI32x4GeS) \
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V(MipsI32x4GtU) \
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V(MipsI32x4GeU) \
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V(MipsI32x4Abs) \
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V(MipsI16x8Splat) \
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V(MipsI16x8ExtractLaneU) \
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V(MipsI16x8ExtractLaneS) \
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@ -230,6 +231,7 @@ namespace compiler {
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V(MipsI16x8GtU) \
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V(MipsI16x8GeU) \
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V(MipsI16x8RoundingAverageU) \
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V(MipsI16x8Abs) \
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V(MipsI8x16Splat) \
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V(MipsI8x16ExtractLaneU) \
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V(MipsI8x16ExtractLaneS) \
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@ -256,6 +258,7 @@ namespace compiler {
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V(MipsI8x16GtU) \
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V(MipsI8x16GeU) \
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V(MipsI8x16RoundingAverageU) \
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V(MipsI8x16Abs) \
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V(MipsS128And) \
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V(MipsS128Or) \
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V(MipsS128Xor) \
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@ -137,6 +137,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kMipsI16x8UConvertI32x4:
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case kMipsI16x8UConvertI8x16High:
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case kMipsI16x8UConvertI8x16Low:
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case kMipsI16x8Abs:
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case kMipsI32x4Add:
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case kMipsI32x4AddHoriz:
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case kMipsI32x4Eq:
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@ -164,6 +165,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kMipsI32x4UConvertF32x4:
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case kMipsI32x4UConvertI16x8High:
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case kMipsI32x4UConvertI16x8Low:
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case kMipsI32x4Abs:
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case kMipsI8x16Add:
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case kMipsI8x16AddSaturateS:
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case kMipsI8x16AddSaturateU:
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@ -192,6 +194,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kMipsI8x16SubSaturateS:
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case kMipsI8x16SubSaturateU:
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case kMipsI8x16UConvertI16x8:
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case kMipsI8x16Abs:
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case kMipsIns:
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case kMipsLsa:
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case kMipsMaddD:
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@ -2169,6 +2169,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
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V(I32x4GeS, kMipsI32x4GeS) \
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V(I32x4GtU, kMipsI32x4GtU) \
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V(I32x4GeU, kMipsI32x4GeU) \
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V(I32x4Abs, kMipsI32x4Abs) \
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V(I16x8Add, kMipsI16x8Add) \
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V(I16x8AddSaturateS, kMipsI16x8AddSaturateS) \
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V(I16x8AddSaturateU, kMipsI16x8AddSaturateU) \
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@ -2190,6 +2191,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
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V(I16x8SConvertI32x4, kMipsI16x8SConvertI32x4) \
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V(I16x8UConvertI32x4, kMipsI16x8UConvertI32x4) \
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V(I16x8RoundingAverageU, kMipsI16x8RoundingAverageU) \
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V(I16x8Abs, kMipsI16x8Abs) \
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V(I8x16Add, kMipsI8x16Add) \
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V(I8x16AddSaturateS, kMipsI8x16AddSaturateS) \
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V(I8x16AddSaturateU, kMipsI8x16AddSaturateU) \
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@ -2210,6 +2212,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
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V(I8x16RoundingAverageU, kMipsI8x16RoundingAverageU) \
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V(I8x16SConvertI16x8, kMipsI8x16SConvertI16x8) \
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V(I8x16UConvertI16x8, kMipsI8x16UConvertI16x8) \
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V(I8x16Abs, kMipsI8x16Abs) \
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V(S128And, kMipsS128And) \
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V(S128Or, kMipsS128Or) \
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V(S128Xor, kMipsS128Xor) \
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@ -2490,6 +2490,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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i.InputSimd128Register(0));
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break;
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}
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case kMips64I32x4Abs: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ asub_s_w(i.OutputSimd128Register(), i.InputSimd128Register(0),
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kSimd128RegZero);
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break;
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}
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case kMips64I16x8Splat: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ fill_h(i.OutputSimd128Register(), i.InputRegister(0));
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@ -2651,6 +2657,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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i.InputSimd128Register(0));
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break;
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}
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case kMips64I16x8Abs: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ asub_s_h(i.OutputSimd128Register(), i.InputSimd128Register(0),
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kSimd128RegZero);
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break;
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}
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case kMips64I8x16Splat: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ fill_b(i.OutputSimd128Register(), i.InputRegister(0));
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@ -2812,6 +2824,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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i.InputSimd128Register(0));
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break;
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}
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case kMips64I8x16Abs: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ asub_s_b(i.OutputSimd128Register(), i.InputSimd128Register(0),
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kSimd128RegZero);
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break;
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}
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case kMips64S128And: {
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CpuFeatureScope msa_scope(tasm(), MIPS_SIMD);
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__ and_v(i.OutputSimd128Register(), i.InputSimd128Register(0),
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@ -233,6 +233,7 @@ namespace compiler {
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V(Mips64I32x4GeS) \
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V(Mips64I32x4GtU) \
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V(Mips64I32x4GeU) \
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V(Mips64I32x4Abs) \
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V(Mips64I16x8Splat) \
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V(Mips64I16x8ExtractLaneU) \
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V(Mips64I16x8ExtractLaneS) \
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@ -260,6 +261,7 @@ namespace compiler {
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V(Mips64I16x8GtU) \
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V(Mips64I16x8GeU) \
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V(Mips64I16x8RoundingAverageU) \
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V(Mips64I16x8Abs) \
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V(Mips64I8x16Splat) \
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V(Mips64I8x16ExtractLaneU) \
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V(Mips64I8x16ExtractLaneS) \
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@ -286,6 +288,7 @@ namespace compiler {
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V(Mips64I8x16GtU) \
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V(Mips64I8x16GeU) \
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V(Mips64I8x16RoundingAverageU) \
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V(Mips64I8x16Abs) \
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V(Mips64S128And) \
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V(Mips64S128Or) \
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V(Mips64S128Xor) \
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@ -167,6 +167,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kMips64I16x8UConvertI8x16High:
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case kMips64I16x8UConvertI8x16Low:
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case kMips64I16x8RoundingAverageU:
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case kMips64I16x8Abs:
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case kMips64I32x4Add:
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case kMips64I32x4AddHoriz:
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case kMips64I32x4Eq:
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@ -194,6 +195,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kMips64I32x4UConvertF32x4:
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case kMips64I32x4UConvertI16x8High:
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case kMips64I32x4UConvertI16x8Low:
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case kMips64I32x4Abs:
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case kMips64I8x16Add:
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case kMips64I8x16AddSaturateS:
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case kMips64I8x16AddSaturateU:
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@ -220,6 +222,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
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case kMips64I8x16SubSaturateS:
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case kMips64I8x16SubSaturateU:
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case kMips64I8x16RoundingAverageU:
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case kMips64I8x16Abs:
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case kMips64Ins:
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case kMips64Lsa:
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case kMips64MaxD:
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@ -2757,12 +2757,15 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
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V(I32x4SConvertI16x8High, kMips64I32x4SConvertI16x8High) \
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V(I32x4UConvertI16x8Low, kMips64I32x4UConvertI16x8Low) \
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V(I32x4UConvertI16x8High, kMips64I32x4UConvertI16x8High) \
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V(I32x4Abs, kMips64I32x4Abs) \
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V(I16x8Neg, kMips64I16x8Neg) \
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V(I16x8SConvertI8x16Low, kMips64I16x8SConvertI8x16Low) \
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V(I16x8SConvertI8x16High, kMips64I16x8SConvertI8x16High) \
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V(I16x8UConvertI8x16Low, kMips64I16x8UConvertI8x16Low) \
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V(I16x8UConvertI8x16High, kMips64I16x8UConvertI8x16High) \
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V(I16x8Abs, kMips64I16x8Abs) \
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V(I8x16Neg, kMips64I8x16Neg) \
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V(I8x16Abs, kMips64I8x16Abs) \
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V(S128Not, kMips64S128Not) \
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V(S1x4AnyTrue, kMips64S1x4AnyTrue) \
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V(S1x4AllTrue, kMips64S1x4AllTrue) \
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