Revert of MIPS: Fix '[turbofan] Prevent storing signalling NaNs into holey double arrays.' (patchset #2 id:20001 of https://codereview.chromium.org/2171303002/ )
Reason for revert:
This bug has an error in the toolchain.gypi file, the conditions clause is repeated. This has broken the DrMemory builder - see first failing chromium build https://build.chromium.org/p/chromium.memory.fyi/builders/Chromium%20Windows%20Builder%20%28DrMemory%29/builds/17857 which included a v8 roll.
For reference the errors are:
gyp: Key 'conditions' repeated at level 11 with key path 'target_defaults.conditions.6.1.target_conditions.0.1.conditions.0.1' while reading C:\b\build\slave\drm-cr\build\src\v8\gypfiles\toolchain.gypi while reading includes of C:\b\build\slave\drm-cr\build\src\v8\src\d8.gyp
gyp: Key 'conditions' repeated at level 11 with key path 'target_defaults.conditions.6.1.target_conditions.0.1.conditions.0.1' while reading C:\b\build\slave\drm-cr\build\src\v8\gypfiles\toolchain.gypi while reading includes of C:\b\build\slave\drm-cr\build\src\v8\src\v8.gyp
gyp: Key 'conditions' repeated at level 11 with key path 'target_defaults.conditions.6.1.target_conditions.0.1.conditions.0.1' while reading C:\b\build\slave\drm-cr\build\src\v8\gypfiles\toolchain.gypi while reading includes of C:\b\build\slave\drm-cr\build\src\v8\samples\samples.gyp
Original issue's description:
> MIPS: Fix '[turbofan] Prevent storing signalling NaNs into holey double arrays.'
>
> Port 6470ddadf9
>
> On MIPS different signaling NaN values must be used for hardware and simulator targets, even at snapshot generation when always simulator is used.
>
> Original commit message:
> This introduces SilenceNaN operator, which makes sure that we only
> store quiet NaNs into holey arrays. We omit the NaN silencing code
> at instruction selection time if the input is an operation that
> cannot possibly produce signalling NaNs.
>
> BUG=
>
> Committed: https://crrev.com/52f2ceb052f63324050c7a098e4398f510b54763
> Cr-Commit-Position: refs/heads/master@{#38030}
TBR=jarin@chromium.org,machenbach@google.com,akos.palfi@mattakis.com,ivica.bogosavljevic@imgtec.com,marija.antic@imgtec.com,ilija.pavlovic.imgtec@gmail.com,akos.palfi@imgtec.com,machenbach@chromium.org,balazs.kilvady@imgtec.com
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=
TBR=machenbach
Review-Url: https://codereview.chromium.org/2184573002
Cr-Commit-Position: refs/heads/master@{#38037}
This commit is contained in:
parent
38764eac0b
commit
73a5db9d06
@ -364,49 +364,28 @@
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],
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'cflags': ['-march=i586'],
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}], # v8_target_arch=="x87"
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['v8_target_arch=="mips" or v8_target_arch=="mipsel" \
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or v8_target_arch=="mips64" or v8_target_arch=="mips64el"', {
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['(v8_target_arch=="mips" or v8_target_arch=="mipsel" \
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or v8_target_arch=="mips64" or v8_target_arch=="mips64el") \
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and v8_target_arch==target_arch', {
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'target_conditions': [
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['_toolset=="target"', {
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# Target built with a Mips CXX compiler.
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'variables': {
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'ldso_path%': '<!(/bin/echo -n $LDSO_PATH)',
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'ld_r_path%': '<!(/bin/echo -n $LD_R_PATH)',
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},
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'conditions': [
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['v8_target_arch==target_arch', {
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# Target built with a Mips CXX compiler.
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'conditions': [
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],
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'variables': {
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'ldso_path%': '<!(/bin/echo -n $LDSO_PATH)',
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'ld_r_path%': '<!(/bin/echo -n $LD_R_PATH)',
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},
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'conditions': [
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['ldso_path!=""', {
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'ldflags': ['-Wl,--dynamic-linker=<(ldso_path)'],
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}],
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['ld_r_path!=""', {
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'ldflags': ['-Wl,--rpath=<(ld_r_path)'],
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}],
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[ 'clang==1', {
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'cflags': ['-integrated-as'],
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}],
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['OS!="mac"', {
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'defines': ['_MIPS_TARGET_HW',],
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}, {
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'defines': ['_MIPS_TARGET_SIMULATOR',],
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}],
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],
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}, {
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'defines': ['_MIPS_TARGET_SIMULATOR',],
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['ldso_path!=""', {
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'ldflags': ['-Wl,--dynamic-linker=<(ldso_path)'],
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}],
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['ld_r_path!=""', {
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'ldflags': ['-Wl,--rpath=<(ld_r_path)'],
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}],
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[ 'clang==1', {
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'cflags': ['-integrated-as'],
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}],
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],
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}], #'_toolset=="target"
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['_toolset=="host"', {
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'conditions': [
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['v8_target_arch==target_arch and OS!="mac"', {
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'defines': ['_MIPS_TARGET_HW',],
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}, {
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'defines': ['_MIPS_TARGET_SIMULATOR',],
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}],
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],
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}], #'_toolset=="host"
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}],
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],
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}],
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['v8_target_arch=="mips"', {
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@ -1335,9 +1335,19 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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case kMipsFloat64InsertHighWord32:
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__ FmoveHigh(i.OutputDoubleRegister(), i.InputRegister(1));
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break;
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case kMipsFloat64SilenceNaN:
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__ FPUCanonicalizeNaN(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
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case kMipsFloat64SilenceNaN: {
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FPURegister value = i.InputDoubleRegister(0);
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FPURegister result = i.OutputDoubleRegister();
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Register scratch0 = i.TempRegister(0);
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Label is_nan, not_nan;
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__ BranchF(NULL, &is_nan, eq, value, value);
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__ Branch(¬_nan);
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__ bind(&is_nan);
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__ LoadRoot(scratch0, Heap::kNanValueRootIndex);
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__ ldc1(result, FieldMemOperand(scratch0, HeapNumber::kValueOffset));
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__ bind(¬_nan);
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break;
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}
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// ... more basic instructions ...
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@ -843,10 +843,8 @@ enum ScopeType {
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// Use mips sNaN which is a not used qNaN in x87 port as sNaN to workaround this
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// issue
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// for some test cases.
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#if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6) && \
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(!defined(USE_SIMULATOR) || !defined(_MIPS_TARGET_SIMULATOR))) || \
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(V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6) && \
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(!defined(USE_SIMULATOR) || !defined(_MIPS_TARGET_SIMULATOR))) || \
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#if (V8_TARGET_ARCH_MIPS && !defined(_MIPS_ARCH_MIPS32R6)) || \
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(V8_TARGET_ARCH_MIPS64 && !defined(_MIPS_ARCH_MIPS64R6)) || \
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(V8_TARGET_ARCH_X87)
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const uint32_t kHoleNanUpper32 = 0xFFFF7FFF;
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const uint32_t kHoleNanLower32 = 0xFFFF7FFF;
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