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[liftoff] Mark unused parameters per platform

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Many platform-dependent LiftoffAssembler methods do not use all
parameters. Comment out the name of unused ones, to make it easier to
see which implementation uses which parameters.

Also, remove {is_load_mem} from arm's {LoadInternal}, because it is
unused there.

R=jkummerow@chromium.org

Bug: v8:10949
Change-Id: I57281237c493cc35c3cd31d814bca9bef510fdd2
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3791049
Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/main@{#82070}
This commit is contained in:
Clemens Backes 2022-07-28 17:23:45 +02:00 committed by V8 LUCI CQ
parent 969f02e846
commit 781a5b5ad6
4 changed files with 24 additions and 19 deletions
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12
src/wasm/baseline/arm/liftoff-assembler-arm.h
View File

@ -644,8 +644,7 @@ namespace liftoff {
inline void LoadInternal(LiftoffAssembler* lasm, LiftoffRegister dst,
Register src_addr, Register offset_reg,
int32_t offset_imm, LoadType type,
uint32_t* protected_load_pc = nullptr,
bool is_load_mem = false) {
uint32_t* protected_load_pc = nullptr) {
DCHECK_IMPLIES(type.value_type() == kWasmI64, dst.is_gp_pair());
UseScratchRegisterScope temps(lasm);
if (type.value() == LoadType::kF64Load ||
@ -794,18 +793,19 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
Register offset_reg, uint32_t offset_imm,
LoadType type, uint32_t* protected_load_pc,
bool is_load_mem, bool i64_offset) {
bool /* is_load_mem */, bool /* i64_offset */) {
// Offsets >=2GB are statically OOB on 32-bit systems.
DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
liftoff::LoadInternal(this, dst, src_addr, offset_reg,
static_cast<int32_t>(offset_imm), type,
protected_load_pc, is_load_mem);
protected_load_pc);
}
void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
uint32_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned,
uint32_t* protected_store_pc, bool is_store_mem) {
uint32_t* protected_store_pc,
bool /* is_store_mem */) {
// Offsets >=2GB are statically OOB on 32-bit systems.
DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
UseScratchRegisterScope temps(this);
@ -1075,7 +1075,7 @@ inline void I64Store(LiftoffAssembler* lasm, LiftoffRegister dst,
void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
Register offset_reg, uint32_t offset_imm,
LoadType type, LiftoffRegList pinned) {
LoadType type, LiftoffRegList /* pinned */) {
if (type.value() != LoadType::kI64Load) {
Load(dst, src_addr, offset_reg, offset_imm, type, nullptr, true);
dmb(ISH);

14
src/wasm/baseline/arm64/liftoff-assembler-arm64.h
View File

@ -489,7 +489,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
Register offset_reg,
int32_t offset_imm,
LiftoffRegister src,
LiftoffRegList pinned,
LiftoffRegList /* pinned */,
SkipWriteBarrier skip_write_barrier) {
UseScratchRegisterScope temps(this);
Operand offset_op = offset_reg.is_valid() ? Operand(offset_reg.W(), UXTW)
@ -527,7 +527,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
Register offset_reg, uintptr_t offset_imm,
LoadType type, uint32_t* protected_load_pc,
bool is_load_mem, bool i64_offset) {
bool /* is_load_mem */, bool i64_offset) {
UseScratchRegisterScope temps(this);
MemOperand src_op = liftoff::GetMemOp(this, &temps, src_addr, offset_reg,
offset_imm, i64_offset);
@ -577,8 +577,9 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
uintptr_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned,
uint32_t* protected_store_pc, bool is_store_mem) {
StoreType type, LiftoffRegList /* pinned */,
uint32_t* protected_store_pc,
bool /* is_store_mem */) {
UseScratchRegisterScope temps(this);
MemOperand dst_op =
liftoff::GetMemOp(this, &temps, dst_addr, offset_reg, offset_imm);
@ -720,7 +721,7 @@ inline void AtomicBinop(LiftoffAssembler* lasm, Register dst_addr,
void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
Register offset_reg, uintptr_t offset_imm,
LoadType type, LiftoffRegList pinned) {
LoadType type, LiftoffRegList /* pinned */) {
UseScratchRegisterScope temps(this);
Register src_reg = liftoff::CalculateActualAddress(
this, src_addr, offset_reg, offset_imm, temps.AcquireX());
@ -747,7 +748,8 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg,
uintptr_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned) {
StoreType type,
LiftoffRegList /* pinned */) {
UseScratchRegisterScope temps(this);
Register dst_reg = liftoff::CalculateActualAddress(
this, dst_addr, offset_reg, offset_imm, temps.AcquireX());

7
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
View File

@ -434,7 +434,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
Register offset_reg, uint32_t offset_imm,
LoadType type, uint32_t* protected_load_pc,
bool is_load_mem, bool i64_offset) {
bool /* is_load_mem */, bool i64_offset) {
// Offsets >=2GB are statically OOB on 32-bit systems.
DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
DCHECK_EQ(type.value_type() == kWasmI64, dst.is_gp_pair());
@ -510,7 +510,8 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
uint32_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned,
uint32_t* protected_store_pc, bool is_store_mem) {
uint32_t* protected_store_pc,
bool /* is_store_mem */) {
DCHECK_EQ(type.value_type() == kWasmI64, src.is_gp_pair());
// Offsets >=2GB are statically OOB on 32-bit systems.
DCHECK_LE(offset_imm, std::numeric_limits<int32_t>::max());
@ -577,7 +578,7 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
Register offset_reg, uint32_t offset_imm,
LoadType type, LiftoffRegList pinned) {
LoadType type, LiftoffRegList /* pinned */) {
if (type.value() != LoadType::kI64Load) {
Load(dst, src_addr, offset_reg, offset_imm, type, nullptr, true);
return;

10
src/wasm/baseline/x64/liftoff-assembler-x64.h
View File

@ -434,14 +434,14 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr,
Register offset_reg, uintptr_t offset_imm,
LoadType type, LiftoffRegList pinned) {
LoadType type, LiftoffRegList /* pinned */) {
Load(dst, src_addr, offset_reg, offset_imm, type, nullptr, true);
}
void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
Register offset_reg, uintptr_t offset_imm,
LoadType type, uint32_t* protected_load_pc,
bool is_load_mem, bool i64_offset) {
bool /* is_load_mem */, bool i64_offset) {
if (offset_reg != no_reg && !i64_offset) {
AssertZeroExtended(offset_reg);
}
@ -493,7 +493,8 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
uintptr_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList /* pinned */,
uint32_t* protected_store_pc, bool is_store_mem) {
uint32_t* protected_store_pc,
bool /* is_store_mem */) {
Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
if (protected_store_pc) *protected_store_pc = pc_offset();
switch (type.value()) {
@ -526,7 +527,8 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg,
uintptr_t offset_imm, LiftoffRegister src,
StoreType type, LiftoffRegList pinned) {
StoreType type,
LiftoffRegList /* pinned */) {
Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
Register src_reg = src.gp();
if (cache_state()->is_used(src)) {