From 794c23057346454e1a1e92c72e16d1fecefb0ce9 Mon Sep 17 00:00:00 2001 From: Milad Fa Date: Fri, 20 Nov 2020 10:18:15 -0500 Subject: [PATCH] PPC/s390: Reland "[wasm][memory64] Prepare Liftoff for ptrsize offsets" Port 1da429fb8a9c1fa37400256b67f12fa4bb95d372 Original Commit Message: This is a reland of 800307f6a5dda215056f30e9ddef0eda8456f90d, with a minimal fix for arm64 (uint64_t -> uintptr_t). Original change's description: > [wasm][memory64] Prepare Liftoff for ptrsize offsets > > This CL prepares the LiftoffAssembler interface for uintptr_t offsets. > Many places can still only handle 32-bit values, but after this CL we can > start storing the offsets as uintptr_t in the memory access immediates. > Some TODOs are placed to extend code generation for 64-bit additions, if > memory64 is enabled. > All of this will be addressed in follow-up CLs. > > R=manoskouk@chromium.org > > Bug: v8:10949 > Change-Id: Id3b9b8aa555ab41f082ba012f4f8d80586c35b89 > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2529452 > Commit-Queue: Clemens Backes > Reviewed-by: Manos Koukoutos > Cr-Commit-Position: refs/heads/master@{#71236} R=clemensb@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: I87a421ab1fe6e4d0f2098c24ff34a3888631722e Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2552166 Reviewed-by: Junliang Yan Commit-Queue: Milad Fa Cr-Commit-Position: refs/heads/master@{#71317} --- src/wasm/baseline/ppc/liftoff-assembler-ppc.h | 31 +++++++++++-------- .../baseline/s390/liftoff-assembler-s390.h | 31 +++++++++++-------- 2 files changed, 36 insertions(+), 26 deletions(-) diff --git a/src/wasm/baseline/ppc/liftoff-assembler-ppc.h b/src/wasm/baseline/ppc/liftoff-assembler-ppc.h index f75e9db459..6a0d02c61b 100644 --- a/src/wasm/baseline/ppc/liftoff-assembler-ppc.h +++ b/src/wasm/baseline/ppc/liftoff-assembler-ppc.h @@ -119,70 +119,70 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr, } void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, - Register offset_reg, uint32_t offset_imm, + Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned, uint32_t* protected_load_pc, bool is_load_mem) { bailout(kUnsupportedArchitecture, "Load"); } void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister src, + uintptr_t offset_imm, LiftoffRegister src, StoreType type, LiftoffRegList pinned, uint32_t* protected_store_pc, bool is_store_mem) { bailout(kUnsupportedArchitecture, "Store"); } void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr, - Register offset_reg, uint32_t offset_imm, + Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned) { bailout(kAtomics, "AtomicLoad"); } void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister src, + uintptr_t offset_imm, LiftoffRegister src, StoreType type, LiftoffRegList pinned) { bailout(kAtomics, "AtomicStore"); } void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicAdd"); } void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicSub"); } void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicAnd"); } void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicOr"); } void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicXor"); } void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg, - uint32_t offset_imm, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicExchange"); } void LiftoffAssembler::AtomicCompareExchange( - Register dst_addr, Register offset_reg, uint32_t offset_imm, + Register dst_addr, Register offset_reg, uintptr_t offset_imm, LiftoffRegister expected, LiftoffRegister new_value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicCompareExchange"); @@ -343,7 +343,7 @@ UNIMPLEMENTED_I32_BINOP_I(i32_xor) UNIMPLEMENTED_I32_SHIFTOP(i32_shl) UNIMPLEMENTED_I32_SHIFTOP(i32_sar) UNIMPLEMENTED_I32_SHIFTOP(i32_shr) -UNIMPLEMENTED_I64_BINOP_I(i64_add) +UNIMPLEMENTED_I64_BINOP(i64_add) UNIMPLEMENTED_I64_BINOP(i64_sub) UNIMPLEMENTED_I64_BINOP(i64_mul) #ifdef V8_TARGET_ARCH_PPC64 @@ -407,6 +407,11 @@ bool LiftoffAssembler::emit_i64_popcnt(LiftoffRegister dst, return true; } +void LiftoffAssembler::emit_i64_addi(LiftoffRegister dst, LiftoffRegister lhs, + int64_t imm) { + bailout(kUnsupportedArchitecture, "i64_addi"); +} + void LiftoffAssembler::emit_i32_divs(Register dst, Register lhs, Register rhs, Label* trap_div_by_zero, Label* trap_div_unrepresentable) { @@ -556,7 +561,7 @@ bool LiftoffAssembler::emit_select(LiftoffRegister dst, Register condition, } void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr, - Register offset_reg, uint32_t offset_imm, + Register offset_reg, uintptr_t offset_imm, LoadType type, LoadTransformationKind transform, uint32_t* protected_load_pc) { diff --git a/src/wasm/baseline/s390/liftoff-assembler-s390.h b/src/wasm/baseline/s390/liftoff-assembler-s390.h index a88baa1146..b06b626f14 100644 --- a/src/wasm/baseline/s390/liftoff-assembler-s390.h +++ b/src/wasm/baseline/s390/liftoff-assembler-s390.h @@ -118,70 +118,70 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr, } void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, - Register offset_reg, uint32_t offset_imm, + Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned, uint32_t* protected_load_pc, bool is_load_mem) { bailout(kUnsupportedArchitecture, "Load"); } void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister src, + uintptr_t offset_imm, LiftoffRegister src, StoreType type, LiftoffRegList pinned, uint32_t* protected_store_pc, bool is_store_mem) { bailout(kUnsupportedArchitecture, "Store"); } void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr, - Register offset_reg, uint32_t offset_imm, + Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned) { bailout(kAtomics, "AtomicLoad"); } void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister src, + uintptr_t offset_imm, LiftoffRegister src, StoreType type, LiftoffRegList pinned) { bailout(kAtomics, "AtomicStore"); } void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicAdd"); } void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicSub"); } void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicAnd"); } void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicOr"); } void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg, - uint32_t offset_imm, LiftoffRegister value, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicXor"); } void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg, - uint32_t offset_imm, + uintptr_t offset_imm, LiftoffRegister value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicExchange"); } void LiftoffAssembler::AtomicCompareExchange( - Register dst_addr, Register offset_reg, uint32_t offset_imm, + Register dst_addr, Register offset_reg, uintptr_t offset_imm, LiftoffRegister expected, LiftoffRegister new_value, LiftoffRegister result, StoreType type) { bailout(kAtomics, "AtomicCompareExchange"); @@ -347,7 +347,7 @@ UNIMPLEMENTED_I32_BINOP_I(i32_xor) UNIMPLEMENTED_I32_SHIFTOP(i32_shl) UNIMPLEMENTED_I32_SHIFTOP(i32_sar) UNIMPLEMENTED_I32_SHIFTOP(i32_shr) -UNIMPLEMENTED_I64_BINOP_I(i64_add) +UNIMPLEMENTED_I64_BINOP(i64_add) UNIMPLEMENTED_I64_BINOP(i64_sub) UNIMPLEMENTED_I64_BINOP(i64_mul) #ifdef V8_TARGET_ARCH_S390X @@ -411,6 +411,11 @@ bool LiftoffAssembler::emit_i64_popcnt(LiftoffRegister dst, return true; } +void LiftoffAssembler::emit_i64_addi(LiftoffRegister dst, LiftoffRegister lhs, + int64_t imm) { + bailout(kUnsupportedArchitecture, "i64_addi"); +} + void LiftoffAssembler::emit_i32_divs(Register dst, Register lhs, Register rhs, Label* trap_div_by_zero, Label* trap_div_unrepresentable) { @@ -560,7 +565,7 @@ bool LiftoffAssembler::emit_select(LiftoffRegister dst, Register condition, } void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr, - Register offset_reg, uint32_t offset_imm, + Register offset_reg, uintptr_t offset_imm, LoadType type, LoadTransformationKind transform, uint32_t* protected_load_pc) {