AuroraMiddleware/v8
1
0
Fork 0
Code Issues 2 Pull Requests Releases Wiki Activity

Fix SHL when shift amount is zero for arm and mips.

Browse Source 
BUG=v8:2817
R=titzer@chromium.org
TEST=octane

Review URL: https://chromiumcodereview.appspot.com/21358002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@15987 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
ulan@chromium.org 2013-07-31 12:46:54 +00:00
parent d16ca488fa
commit 7ad3db7485
2 changed files with 6 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/arm/lithium-codegen-arm.cc
View File

@ -1746,8 +1746,10 @@ void LCodeGen::DoShiftI(LShiftI* instr) {
instr->can_deopt()) {
if (shift_count != 1) {
__ mov(result, Operand(left, LSL, shift_count - 1));
__ SmiTag(result, result, SetCC);
} else {
__ SmiTag(result, left, SetCC);
}
__ SmiTag(result, result, SetCC);
DeoptimizeIf(vs, instr->environment());
} else {
__ mov(result, Operand(left, LSL, shift_count));

4
src/mips/lithium-codegen-mips.cc
View File

@ -1585,8 +1585,10 @@ void LCodeGen::DoShiftI(LShiftI* instr) {
instr->can_deopt()) {
if (shift_count != 1) {
__ sll(result, left, shift_count - 1);
__ SmiTagCheckOverflow(result, result, scratch);
} else {
__ SmiTagCheckOverflow(result, left, scratch);
}
__ SmiTagCheckOverflow(result, result, scratch);
DeoptimizeIf(lt, instr->environment(), scratch, Operand(zero_reg));
} else {
__ sll(result, left, shift_count);