Revert "[liftoff][arm64] Zero-extend offsets also for SIMD"
This reverts commit b99fe75c6d
.
Reason for revert:
https://ci.chromium.org/p/v8/builders/ci/V8%20Linux/43105
Original change's description:
> [liftoff][arm64] Zero-extend offsets also for SIMD
>
> This extends https://crrev.com/c/2917612 also for SIMD, which
> (sometimes) uses the special {GetMemOpWithImmOffsetZero} method.
> As part of this CL, that method is renamed to {GetEffectiveAddress}
> which IMO is a better name. Also, it just returns a register to make the
> semantic of that function obvious in the signature.
>
> Drive-by: When sign extending to 32 bit, only write to the W portion of
> the register. This is a bit cleaner, and I first thought that
> this would be the bug.
>
> R=jkummerow@chromium.org
> CC=thibaudm@chromium.org
>
> Bug: chromium:1231950, v8:12018
> Change-Id: Ifaefe1f18e3a00534a30c99e3c37ed09d9508f6e
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3049073
> Reviewed-by: Zhi An Ng <zhin@chromium.org>
> Commit-Queue: Clemens Backes <clemensb@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#75898}
Bug: chromium:1231950, v8:12018
Change-Id: I4e7a9d6fa6809b7c4d9be919cd5698737d784849
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3049085
Auto-Submit: Michael Achenbach <machenbach@chromium.org>
Commit-Queue: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Cr-Commit-Position: refs/heads/master@{#75900}
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@ -138,23 +138,27 @@ inline MemOperand GetMemOp(LiftoffAssembler* assm,
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: MemOperand(effective_addr, offset.W(), UXTW);
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}
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// Compute the effective address (sum of |addr|, |offset| (if given) and
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// |offset_imm|) into a temporary register. This is needed for certain load
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// instructions that do not support an offset (register or immediate).
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// Returns |addr| if both |offset| and |offset_imm| are zero.
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inline Register GetEffectiveAddress(LiftoffAssembler* assm,
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UseScratchRegisterScope* temps,
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Register addr, Register offset,
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uintptr_t offset_imm) {
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if (!offset.is_valid() && offset_imm == 0) return addr;
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// Certain load instructions do not support offset (register or immediate).
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// This creates a MemOperand that is suitable for such instructions by adding
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// |addr|, |offset| (if needed), and |offset_imm| into a temporary.
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inline MemOperand GetMemOpWithImmOffsetZero(LiftoffAssembler* assm,
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UseScratchRegisterScope* temps,
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Register addr, Register offset,
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uintptr_t offset_imm) {
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Register tmp = temps->AcquireX();
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if (offset.is_valid()) {
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// TODO(clemensb): This needs adaption for memory64.
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assm->Add(tmp, addr, Operand(offset, UXTW));
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addr = tmp;
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// offset has passed BoundsCheckMem in liftoff-compiler, and been unsigned
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// extended, so it is fine to use the full width of the register.
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assm->Add(tmp, addr, offset);
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if (offset_imm != 0) {
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assm->Add(tmp, tmp, offset_imm);
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}
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} else {
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if (offset_imm != 0) {
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assm->Add(tmp, addr, offset_imm);
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}
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}
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if (offset_imm != 0) assm->Add(tmp, addr, offset_imm);
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return tmp;
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return MemOperand(tmp.X(), 0);
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}
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enum class ShiftDirection : bool { kLeft, kRight };
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@ -1497,11 +1501,11 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
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}
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void LiftoffAssembler::emit_i32_signextend_i8(Register dst, Register src) {
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sxtb(dst.W(), src.W());
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sxtb(dst, src);
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}
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void LiftoffAssembler::emit_i32_signextend_i16(Register dst, Register src) {
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sxth(dst.W(), src.W());
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sxth(dst, src);
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}
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void LiftoffAssembler::emit_i64_signextend_i8(LiftoffRegister dst,
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@ -1635,8 +1639,8 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
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UseScratchRegisterScope temps(this);
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MemOperand src_op =
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transform == LoadTransformationKind::kSplat
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? MemOperand{liftoff::GetEffectiveAddress(this, &temps, src_addr,
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offset_reg, offset_imm)}
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? liftoff::GetMemOpWithImmOffsetZero(this, &temps, src_addr,
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offset_reg, offset_imm)
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: liftoff::GetMemOp(this, &temps, src_addr, offset_reg, offset_imm);
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*protected_load_pc = pc_offset();
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MachineType memtype = type.mem_type();
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@ -1687,8 +1691,8 @@ void LiftoffAssembler::LoadLane(LiftoffRegister dst, LiftoffRegister src,
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uintptr_t offset_imm, LoadType type,
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uint8_t laneidx, uint32_t* protected_load_pc) {
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UseScratchRegisterScope temps(this);
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MemOperand src_op{
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liftoff::GetEffectiveAddress(this, &temps, addr, offset_reg, offset_imm)};
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MemOperand src_op = liftoff::GetMemOpWithImmOffsetZero(
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this, &temps, addr, offset_reg, offset_imm);
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*protected_load_pc = pc_offset();
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MachineType mem_type = type.mem_type();
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@ -1714,8 +1718,8 @@ void LiftoffAssembler::StoreLane(Register dst, Register offset,
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StoreType type, uint8_t lane,
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uint32_t* protected_store_pc) {
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UseScratchRegisterScope temps(this);
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MemOperand dst_op{
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liftoff::GetEffectiveAddress(this, &temps, dst, offset, offset_imm)};
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MemOperand dst_op =
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liftoff::GetMemOpWithImmOffsetZero(this, &temps, dst, offset, offset_imm);
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if (protected_store_pc) *protected_store_pc = pc_offset();
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MachineRepresentation rep = type.mem_rep();
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@ -1456,12 +1456,6 @@
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'concurrent-initial-prototype-change-1': [SKIP],
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}], # variant == concurrent_inlining
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##############################################################################
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['variant == instruction_scheduling or variant == stress_instruction_scheduling', {
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# BUG(12018): This test currently fails with --turbo-instruction-scheduling.
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'regress/wasm/regress-1231950': [SKIP],
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}], # variant == instruction_scheduling or variant == stress_instruction_scheduling
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################################################################################
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['single_generation', {
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# These tests rely on allocation site tracking which only works in the young generation.
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@ -1,18 +0,0 @@
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// Copyright 2021 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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load('test/mjsunit/wasm/wasm-module-builder.js');
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const builder = new WasmModuleBuilder();
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builder.addMemory(1, 1);
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builder.addFunction('main', kSig_d_v)
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.addBody([
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...wasmI32Const(-3), // i32.const
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kExprI32SExtendI8, // i32.extend8_s
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kSimdPrefix, kExprS128Load32Splat, 0x01, 0x02, // s128.load32_splat
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kExprUnreachable, // unreachable
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])
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.exportFunc();
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const instance = builder.instantiate();
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assertTraps(kTrapMemOutOfBounds, instance.exports.main);
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