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[compiler] Remove SpeculationFence

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It's not being used, and causes compile errors on windows because of a
name clash (see referenced bugs).

R=mstarzinger@chromium.org
CC=tebbi@chromium.org, jarin@chromium.org

Bug: v8:8953
Change-Id: I22dcdbcbe92f92c390a2f2cdd289dda7f7dc4eb1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1505794
Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#60117}
This commit is contained in:
Clemens Hammacher 2019-03-06 13:44:26 +01:00 committed by Commit Bot
parent bff8621397
commit 8161d6b40c
18 changed files with 11 additions and 102 deletions
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8
src/compiler/backend/arm/instruction-selector-arm.cc
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@ -1125,11 +1125,6 @@ void InstructionSelector::VisitWord32ReverseBytes(Node* node) {
void InstructionSelector::VisitWord32Popcnt(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitSpeculationFence(Node* node) {
ArmOperandGenerator g(this);
Emit(kArmDsbIsb, g.NoOutput());
}
void InstructionSelector::VisitInt32Add(Node* node) {
ArmOperandGenerator g(this);
Int32BinopMatcher m(node);
@ -2694,8 +2689,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
// static
MachineOperatorBuilder::Flags
InstructionSelector::SupportedMachineOperatorFlags() {
MachineOperatorBuilder::Flags flags =
MachineOperatorBuilder::kSpeculationFence;
MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags;
if (CpuFeatures::IsSupported(SUDIV)) {
// The sdiv and udiv instructions correctly return 0 if the divisor is 0,
// but the fall-back implementation does not.

8
src/compiler/backend/arm64/instruction-selector-arm64.cc
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@ -1283,11 +1283,6 @@ void InstructionSelector::VisitWord32Popcnt(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitWord64Popcnt(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitSpeculationFence(Node* node) {
Arm64OperandGenerator g(this);
Emit(kArm64DsbIsb, g.NoOutput());
}
void InstructionSelector::VisitInt32Add(Node* node) {
Arm64OperandGenerator g(this);
Int32BinopMatcher m(node);
@ -3272,8 +3267,7 @@ InstructionSelector::SupportedMachineOperatorFlags() {
MachineOperatorBuilder::kInt32DivIsSafe |
MachineOperatorBuilder::kUint32DivIsSafe |
MachineOperatorBuilder::kWord32ReverseBits |
MachineOperatorBuilder::kWord64ReverseBits |
MachineOperatorBuilder::kSpeculationFence;
MachineOperatorBuilder::kWord64ReverseBits;
}
// static

8
src/compiler/backend/ia32/instruction-selector-ia32.cc
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@ -277,11 +277,6 @@ void InstructionSelector::VisitDebugAbort(Node* node) {
Emit(kArchDebugAbort, g.NoOutput(), g.UseFixed(node->InputAt(0), edx));
}
void InstructionSelector::VisitSpeculationFence(Node* node) {
IA32OperandGenerator g(this);
Emit(kLFence, g.NoOutput());
}
void InstructionSelector::VisitLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
@ -2441,8 +2436,7 @@ MachineOperatorBuilder::Flags
InstructionSelector::SupportedMachineOperatorFlags() {
MachineOperatorBuilder::Flags flags =
MachineOperatorBuilder::kWord32ShiftIsSafe |
MachineOperatorBuilder::kWord32Ctz |
MachineOperatorBuilder::kSpeculationFence;
MachineOperatorBuilder::kWord32Ctz;
if (CpuFeatures::IsSupported(POPCNT)) {
flags |= MachineOperatorBuilder::kWord32Popcnt;
}

2
src/compiler/backend/instruction-selector.cc
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@ -1764,8 +1764,6 @@ void InstructionSelector::VisitNode(Node* node) {
ATOMIC_CASE(Exchange)
ATOMIC_CASE(CompareExchange)
#undef ATOMIC_CASE
case IrOpcode::kSpeculationFence:
return VisitSpeculationFence(node);
case IrOpcode::kProtectedLoad: {
LoadRepresentation type = LoadRepresentationOf(node->op());
MarkAsRepresentation(type.representation(), node);

2
src/compiler/backend/mips/instruction-selector-mips.cc
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@ -1994,8 +1994,6 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
UNREACHABLE();
}
void InstructionSelector::VisitSpeculationFence(Node* node) { UNREACHABLE(); }
#define SIMD_TYPE_LIST(V) \
V(F32x4) \
V(I32x4) \

2
src/compiler/backend/mips64/instruction-selector-mips64.cc
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@ -2649,8 +2649,6 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
UNREACHABLE();
}
void InstructionSelector::VisitSpeculationFence(Node* node) { UNREACHABLE(); }
#define SIMD_TYPE_LIST(V) \
V(F32x4) \
V(I32x4) \

2
src/compiler/backend/ppc/instruction-selector-ppc.cc
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@ -935,8 +935,6 @@ void InstructionSelector::VisitWord32ReverseBytes(Node* node) {
g.UseRegister(node->InputAt(0)));
}
void InstructionSelector::VisitSpeculationFence(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitInt32Add(Node* node) {
VisitBinop<Int32BinopMatcher>(this, node, kPPC_Add32, kInt16Imm);
}

2
src/compiler/backend/s390/instruction-selector-s390.cc
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@ -1143,8 +1143,6 @@ void InstructionSelector::VisitWord32ReverseBits(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitWord64ReverseBits(Node* node) { UNREACHABLE(); }
#endif
void InstructionSelector::VisitSpeculationFence(Node* node) { UNREACHABLE(); }
void InstructionSelector::VisitInt32AbsWithOverflow(Node* node) {
VisitWord32UnaryOp(this, node, kS390_Abs32, OperandMode::kNone);
}

8
src/compiler/backend/x64/instruction-selector-x64.cc
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@ -317,11 +317,6 @@ void InstructionSelector::VisitDebugAbort(Node* node) {
Emit(kArchDebugAbort, g.NoOutput(), g.UseFixed(node->InputAt(0), rdx));
}
void InstructionSelector::VisitSpeculationFence(Node* node) {
X64OperandGenerator g(this);
Emit(kLFence, g.NoOutput());
}
void InstructionSelector::VisitLoad(Node* node) {
LoadRepresentation load_rep = LoadRepresentationOf(node->op());
X64OperandGenerator g(this);
@ -3066,8 +3061,7 @@ MachineOperatorBuilder::Flags
InstructionSelector::SupportedMachineOperatorFlags() {
MachineOperatorBuilder::Flags flags =
MachineOperatorBuilder::kWord32ShiftIsSafe |
MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz |
MachineOperatorBuilder::kSpeculationFence;
MachineOperatorBuilder::kWord32Ctz | MachineOperatorBuilder::kWord64Ctz;
if (CpuFeatures::IsSupported(POPCNT)) {
flags |= MachineOperatorBuilder::kWord32Popcnt |
MachineOperatorBuilder::kWord64Popcnt;

12
src/compiler/machine-operator.cc
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@ -781,13 +781,6 @@ struct MachineOperatorGlobalCache {
};
Word64PoisonOnSpeculation kWord64PoisonOnSpeculation;
struct SpeculationFenceOperator : public Operator {
SpeculationFenceOperator()
: Operator(IrOpcode::kSpeculationFence, Operator::kNoThrow,
"SpeculationFence", 0, 1, 1, 0, 1, 0) {}
};
SpeculationFenceOperator kSpeculationFence;
struct DebugAbortOperator : public Operator {
DebugAbortOperator()
: Operator(IrOpcode::kDebugAbort, Operator::kNoThrow, "DebugAbort", 1,
@ -1228,11 +1221,6 @@ const Operator* MachineOperatorBuilder::Word64PoisonOnSpeculation() {
return &cache_.kWord64PoisonOnSpeculation;
}
const OptionalOperator MachineOperatorBuilder::SpeculationFence() {
return OptionalOperator(flags_ & kSpeculationFence,
&cache_.kSpeculationFence);
}
#define SIMD_LANE_OPS(Type, lane_count) \
const Operator* MachineOperatorBuilder::Type##ExtractLane( \
int32_t lane_index) { \

17
src/compiler/machine-operator.h
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@ -142,14 +142,13 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
kWord64ReverseBits = 1u << 17,
kInt32AbsWithOverflow = 1u << 20,
kInt64AbsWithOverflow = 1u << 21,
kSpeculationFence = 1u << 22,
kAllOptionalOps =
kFloat32RoundDown | kFloat64RoundDown | kFloat32RoundUp |
kFloat64RoundUp | kFloat32RoundTruncate | kFloat64RoundTruncate |
kFloat64RoundTiesAway | kFloat32RoundTiesEven | kFloat64RoundTiesEven |
kWord32Ctz | kWord64Ctz | kWord32Popcnt | kWord64Popcnt |
kWord32ReverseBits | kWord64ReverseBits | kInt32AbsWithOverflow |
kInt64AbsWithOverflow | kSpeculationFence
kAllOptionalOps = kFloat32RoundDown | kFloat64RoundDown | kFloat32RoundUp |
kFloat64RoundUp | kFloat32RoundTruncate |
kFloat64RoundTruncate | kFloat64RoundTiesAway |
kFloat32RoundTiesEven | kFloat64RoundTiesEven |
kWord32Ctz | kWord64Ctz | kWord32Popcnt | kWord64Popcnt |
kWord32ReverseBits | kWord64ReverseBits |
kInt32AbsWithOverflow | kInt64AbsWithOverflow
};
typedef base::Flags<Flag, unsigned> Flags;
@ -671,8 +670,6 @@ class V8_EXPORT_PRIVATE MachineOperatorBuilder final
// new_value_high, new_value_low
const Operator* Word32AtomicPairCompareExchange();
const OptionalOperator SpeculationFence();
// Target machine word-size assumed by this builder.
bool Is32() const { return word() == MachineRepresentation::kWord32; }
bool Is64() const { return word() == MachineRepresentation::kWord64; }

1
src/compiler/opcodes.h
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@ -696,7 +696,6 @@
V(Word32AtomicPairXor) \
V(Word32AtomicPairExchange) \
V(Word32AtomicPairCompareExchange) \
V(SpeculationFence) \
V(SignExtendWord8ToInt32) \
V(SignExtendWord16ToInt32) \
V(SignExtendWord8ToInt64) \

4
src/compiler/raw-machine-assembler.h
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@ -266,10 +266,6 @@ class V8_EXPORT_PRIVATE RawMachineAssembler {
old_value, new_value);
}
Node* SpeculationFence() {
return AddNode(machine()->SpeculationFence().op());
}
// Arithmetic Operations.
Node* WordAnd(Node* a, Node* b) {
return AddNode(machine()->WordAnd(), a, b);

1
src/compiler/verifier.cc
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@ -1807,7 +1807,6 @@ void Verifier::Visitor::Check(Node* node, const AllNodes& all) {
case IrOpcode::kWord32AtomicPairXor:
case IrOpcode::kWord32AtomicPairExchange:
case IrOpcode::kWord32AtomicPairCompareExchange:
case IrOpcode::kSpeculationFence:
case IrOpcode::kSignExtendWord8ToInt32:
case IrOpcode::kSignExtendWord16ToInt32:
case IrOpcode::kSignExtendWord8ToInt64:

9
test/unittests/compiler/arm/instruction-selector-arm-unittest.cc
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@ -3240,15 +3240,6 @@ TEST_F(InstructionSelectorTest, Float64Neg) {
EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
}
TEST_F(InstructionSelectorTest, SpeculationFence) {
StreamBuilder m(this, MachineType::Int32());
m.SpeculationFence();
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
EXPECT_EQ(kArmDsbIsb, s[0]->arch_opcode());
}
TEST_F(InstructionSelectorTest, StackCheck0) {
StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer());
Node* const sp = m.LoadStackPointer();

9
test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc
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@ -4461,15 +4461,6 @@ TEST_F(InstructionSelectorTest, CompareFloat64HighGreaterThanOrEqualZero64) {
EXPECT_EQ(63, s.ToInt32(s[1]->InputAt(1)));
}
TEST_F(InstructionSelectorTest, SpeculationFence) {
StreamBuilder m(this, MachineType::Int32());
m.SpeculationFence();
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
EXPECT_EQ(kArm64DsbIsb, s[0]->arch_opcode());
}
TEST_F(InstructionSelectorTest, StackCheck0) {
StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer());
Node* const sp = m.LoadStackPointer();

9
test/unittests/compiler/ia32/instruction-selector-ia32-unittest.cc
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@ -840,15 +840,6 @@ TEST_F(InstructionSelectorTest, Word32Clz) {
EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
}
TEST_F(InstructionSelectorTest, SpeculationFence) {
StreamBuilder m(this, MachineType::Int32());
m.SpeculationFence();
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
EXPECT_EQ(kLFence, s[0]->arch_opcode());
}
TEST_F(InstructionSelectorTest, StackCheck0) {
ExternalReference js_stack_limit =
ExternalReference::Create(isolate()->stack_guard()->address_of_jslimit());

9
test/unittests/compiler/x64/instruction-selector-x64-unittest.cc
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@ -1723,15 +1723,6 @@ TEST_F(InstructionSelectorTest, LoadAndWord64ShiftRight32) {
}
}
TEST_F(InstructionSelectorTest, SpeculationFence) {
StreamBuilder m(this, MachineType::Int32());
m.SpeculationFence();
m.Return(m.Int32Constant(0));
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
EXPECT_EQ(kLFence, s[0]->arch_opcode());
}
TEST_F(InstructionSelectorTest, StackCheck0) {
ExternalReference js_stack_limit =
ExternalReference::Create(isolate()->stack_guard()->address_of_jslimit());