MIPS: Fix missing falthru handling for some branch cases in TF.

TEST=mjsunit/asm/embenchen/zlib
BUG=

Review URL: https://codereview.chromium.org/1232313007

Cr-Commit-Position: refs/heads/master@{#29735}
This commit is contained in:
dusan.milosavljevic 2015-07-17 08:59:31 -07:00 committed by Commit bot
parent ddb5c2d999
commit 82339644b2
3 changed files with 2 additions and 25 deletions

View File

@ -907,42 +907,32 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
cc = FlagsConditionToConditionTst(branch->condition);
__ And(at, i.InputRegister(0), i.InputOperand(1));
__ Branch(tlabel, cc, at, Operand(zero_reg));
} else if (instr->arch_opcode() == kMipsAddOvf ||
instr->arch_opcode() == kMipsSubOvf) {
// kMipsAddOvf, SubOvf emit negative result to 'kCompareReg' on overflow.
cc = FlagsConditionToConditionOvf(branch->condition);
__ Branch(tlabel, cc, kCompareReg, Operand(zero_reg));
} else if (instr->arch_opcode() == kMipsCmp) {
cc = FlagsConditionToConditionCmp(branch->condition);
__ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
} else if (instr->arch_opcode() == kMipsCmpS) {
if (!convertCondition(branch->condition, cc)) {
UNSUPPORTED_COND(kMips64CmpS, branch->condition);
}
__ BranchF32(tlabel, NULL, cc, i.InputSingleRegister(0),
i.InputSingleRegister(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
} else if (instr->arch_opcode() == kMipsCmpD) {
if (!convertCondition(branch->condition, cc)) {
UNSUPPORTED_COND(kMips64CmpD, branch->condition);
}
__ BranchF64(tlabel, NULL, cc, i.InputDoubleRegister(0),
i.InputDoubleRegister(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
} else {
PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
instr->arch_opcode());
UNIMPLEMENTED();
}
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
}

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@ -983,37 +983,30 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
} else if (instr->arch_opcode() == kMips64Dadd ||
instr->arch_opcode() == kMips64Dsub) {
cc = FlagsConditionToConditionOvf(branch->condition);
__ dsra32(kScratchReg, i.OutputRegister(), 0);
__ sra(at, i.OutputRegister(), 31);
__ Branch(tlabel, cc, at, Operand(kScratchReg));
} else if (instr->arch_opcode() == kMips64Cmp) {
cc = FlagsConditionToConditionCmp(branch->condition);
__ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
} else if (instr->arch_opcode() == kMips64CmpS) {
if (!convertCondition(branch->condition, cc)) {
UNSUPPORTED_COND(kMips64CmpS, branch->condition);
}
__ BranchF32(tlabel, NULL, cc, i.InputSingleRegister(0),
i.InputSingleRegister(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
} else if (instr->arch_opcode() == kMips64CmpD) {
if (!convertCondition(branch->condition, cc)) {
UNSUPPORTED_COND(kMips64CmpD, branch->condition);
}
__ BranchF64(tlabel, NULL, cc, i.InputDoubleRegister(0),
i.InputDoubleRegister(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
} else {
PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
instr->arch_opcode());
UNIMPLEMENTED();
}
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
}

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@ -493,9 +493,6 @@
##############################################################################
['arch == mipsel or arch == mips', {
# Bug in zlib due to 35eb3a0260d349cb4201fed66ff62a438962bd47
'asm/embenchen/zlib': [SKIP],
# Slow tests which times out in debug mode.
'try': [PASS, ['mode == debug', SKIP]],
'debug-scripts-request': [PASS, ['mode == debug', SKIP]],
@ -535,9 +532,6 @@
##############################################################################
['arch == mips64el', {
# Bug in zlib due to 35eb3a0260d349cb4201fed66ff62a438962bd47
'asm/embenchen/zlib': [SKIP],
# Slow tests which times out in debug mode.
'try': [PASS, ['mode == debug', SKIP]],
'debug-scripts-request': [PASS, ['mode == debug', SKIP]],