MIPS: Fix missing falthru handling for some branch cases in TF.
TEST=mjsunit/asm/embenchen/zlib BUG= Review URL: https://codereview.chromium.org/1232313007 Cr-Commit-Position: refs/heads/master@{#29735}
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@ -907,42 +907,32 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
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cc = FlagsConditionToConditionTst(branch->condition);
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__ And(at, i.InputRegister(0), i.InputOperand(1));
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__ Branch(tlabel, cc, at, Operand(zero_reg));
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} else if (instr->arch_opcode() == kMipsAddOvf ||
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instr->arch_opcode() == kMipsSubOvf) {
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// kMipsAddOvf, SubOvf emit negative result to 'kCompareReg' on overflow.
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cc = FlagsConditionToConditionOvf(branch->condition);
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__ Branch(tlabel, cc, kCompareReg, Operand(zero_reg));
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} else if (instr->arch_opcode() == kMipsCmp) {
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cc = FlagsConditionToConditionCmp(branch->condition);
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__ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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} else if (instr->arch_opcode() == kMipsCmpS) {
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if (!convertCondition(branch->condition, cc)) {
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UNSUPPORTED_COND(kMips64CmpS, branch->condition);
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}
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__ BranchF32(tlabel, NULL, cc, i.InputSingleRegister(0),
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i.InputSingleRegister(1));
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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} else if (instr->arch_opcode() == kMipsCmpD) {
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if (!convertCondition(branch->condition, cc)) {
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UNSUPPORTED_COND(kMips64CmpD, branch->condition);
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}
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__ BranchF64(tlabel, NULL, cc, i.InputDoubleRegister(0),
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i.InputDoubleRegister(1));
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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} else {
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PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
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instr->arch_opcode());
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UNIMPLEMENTED();
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}
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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}
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@ -983,37 +983,30 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
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} else if (instr->arch_opcode() == kMips64Dadd ||
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instr->arch_opcode() == kMips64Dsub) {
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cc = FlagsConditionToConditionOvf(branch->condition);
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__ dsra32(kScratchReg, i.OutputRegister(), 0);
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__ sra(at, i.OutputRegister(), 31);
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__ Branch(tlabel, cc, at, Operand(kScratchReg));
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} else if (instr->arch_opcode() == kMips64Cmp) {
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cc = FlagsConditionToConditionCmp(branch->condition);
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__ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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} else if (instr->arch_opcode() == kMips64CmpS) {
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if (!convertCondition(branch->condition, cc)) {
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UNSUPPORTED_COND(kMips64CmpS, branch->condition);
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}
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__ BranchF32(tlabel, NULL, cc, i.InputSingleRegister(0),
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i.InputSingleRegister(1));
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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} else if (instr->arch_opcode() == kMips64CmpD) {
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if (!convertCondition(branch->condition, cc)) {
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UNSUPPORTED_COND(kMips64CmpD, branch->condition);
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}
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__ BranchF64(tlabel, NULL, cc, i.InputDoubleRegister(0),
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i.InputDoubleRegister(1));
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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} else {
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PrintF("AssembleArchBranch Unimplemented arch_opcode: %d\n",
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instr->arch_opcode());
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UNIMPLEMENTED();
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}
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if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
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}
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@ -493,9 +493,6 @@
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##############################################################################
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['arch == mipsel or arch == mips', {
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# Bug in zlib due to 35eb3a0260d349cb4201fed66ff62a438962bd47
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'asm/embenchen/zlib': [SKIP],
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# Slow tests which times out in debug mode.
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'try': [PASS, ['mode == debug', SKIP]],
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'debug-scripts-request': [PASS, ['mode == debug', SKIP]],
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@ -535,9 +532,6 @@
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##############################################################################
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['arch == mips64el', {
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# Bug in zlib due to 35eb3a0260d349cb4201fed66ff62a438962bd47
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'asm/embenchen/zlib': [SKIP],
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# Slow tests which times out in debug mode.
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'try': [PASS, ['mode == debug', SKIP]],
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'debug-scripts-request': [PASS, ['mode == debug', SKIP]],
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