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[arm64] Allow immediate-index write barriers.

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This is effectively a port of 4eff883b (r27731).

BUG=

Review URL: https://codereview.chromium.org/1671883003

Cr-Commit-Position: refs/heads/master@{#33807}
This commit is contained in:
jacob.bramley 2016-02-08 01:10:31 -08:00 committed by Commit bot
parent bb883395a8
commit 8643391f0d
2 changed files with 23 additions and 4 deletions
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14
src/compiler/arm64/code-generator-arm64.cc
View File

@ -270,7 +270,7 @@ class OutOfLineLoadZero final : public OutOfLineCode {
class OutOfLineRecordWrite final : public OutOfLineCode {
public:
OutOfLineRecordWrite(CodeGenerator* gen, Register object, Register index,
OutOfLineRecordWrite(CodeGenerator* gen, Register object, Operand index,
Register value, Register scratch0, Register scratch1,
RecordWriteMode mode)
: OutOfLineCode(gen),
@ -302,7 +302,7 @@ class OutOfLineRecordWrite final : public OutOfLineCode {
private:
Register const object_;
Register const index_;
Operand const index_;
Register const value_;
Register const scratch0_;
Register const scratch1_;
@ -632,8 +632,16 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
case kArchStoreWithWriteBarrier: {
RecordWriteMode mode =
static_cast<RecordWriteMode>(MiscField::decode(instr->opcode()));
AddressingMode addressing_mode =
AddressingModeField::decode(instr->opcode());
Register object = i.InputRegister(0);
Register index = i.InputRegister(1);
Operand index(0);
if (addressing_mode == kMode_MRI) {
index = Operand(i.InputInt64(1));
} else {
DCHECK_EQ(addressing_mode, kMode_MRR);
index = Operand(i.InputRegister(1));
}
Register value = i.InputRegister(2);
Register scratch0 = i.TempRegister(0);
Register scratch1 = i.TempRegister(1);

13
src/compiler/arm64/instruction-selector-arm64.cc
View File

@ -398,10 +398,20 @@ void InstructionSelector::VisitStore(Node* node) {
// TODO(arm64): I guess this could be done in a better way.
if (write_barrier_kind != kNoWriteBarrier) {
DCHECK_EQ(MachineRepresentation::kTagged, rep);
AddressingMode addressing_mode;
InstructionOperand inputs[3];
size_t input_count = 0;
inputs[input_count++] = g.UseUniqueRegister(base);
inputs[input_count++] = g.UseUniqueRegister(index);
// OutOfLineRecordWrite uses the index in an arithmetic instruction, so we
// must check kArithmeticImm as well as kLoadStoreImm64.
if (g.CanBeImmediate(index, kArithmeticImm) &&
g.CanBeImmediate(index, kLoadStoreImm64)) {
inputs[input_count++] = g.UseImmediate(index);
addressing_mode = kMode_MRI;
} else {
inputs[input_count++] = g.UseUniqueRegister(index);
addressing_mode = kMode_MRR;
}
inputs[input_count++] = (write_barrier_kind == kMapWriteBarrier)
? g.UseRegister(value)
: g.UseUniqueRegister(value);
@ -423,6 +433,7 @@ void InstructionSelector::VisitStore(Node* node) {
InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()};
size_t const temp_count = arraysize(temps);
InstructionCode code = kArchStoreWithWriteBarrier;
code |= AddressingModeField::encode(addressing_mode);
code |= MiscField::encode(static_cast<int>(record_write_mode));
Emit(code, 0, nullptr, input_count, inputs, temp_count, temps);
} else {