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[arm64] Use logical immediates when matching tst instructions.

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R=bmeurer@chromium.org
BUG=

Review URL: https://codereview.chromium.org/668633003

Cr-Commit-Position: refs/heads/master@{#24882}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24882 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
This commit is contained in:
baptiste.afsa@arm.com 2014-10-24 15:29:19 +00:00
parent f916299225
commit 878ff91c8f
2 changed files with 34 additions and 19 deletions
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49
src/compiler/arm64/instruction-selector-arm64.cc
View File

@ -982,16 +982,16 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
// Shared routine for multiple word compare operations.
static void VisitWordCompare(InstructionSelector* selector, Node* node,
InstructionCode opcode, FlagsContinuation* cont,
bool commutative) {
bool commutative, ImmediateMode immediate_mode) {
Arm64OperandGenerator g(selector);
Node* left = node->InputAt(0);
Node* right = node->InputAt(1);
// Match immediates on left or right side of comparison.
if (g.CanBeImmediate(right, kArithmeticImm)) {
if (g.CanBeImmediate(right, immediate_mode)) {
VisitCompare(selector, opcode, g.UseRegister(left), g.UseImmediate(right),
cont);
} else if (g.CanBeImmediate(left, kArithmeticImm)) {
} else if (g.CanBeImmediate(left, immediate_mode)) {
if (!commutative) cont->Commute();
VisitCompare(selector, opcode, g.UseRegister(right), g.UseImmediate(left),
cont);
@ -1004,7 +1004,7 @@ static void VisitWordCompare(InstructionSelector* selector, Node* node,
static void VisitWord32Compare(InstructionSelector* selector, Node* node,
FlagsContinuation* cont) {
VisitWordCompare(selector, node, kArm64Cmp32, cont, false);
VisitWordCompare(selector, node, kArm64Cmp32, cont, false, kArithmeticImm);
}
@ -1098,16 +1098,20 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
return VisitWord32Compare(this, value, &cont);
case IrOpcode::kWord64Equal:
cont.OverwriteAndNegateIfEqual(kEqual);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false,
kArithmeticImm);
case IrOpcode::kInt64LessThan:
cont.OverwriteAndNegateIfEqual(kSignedLessThan);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false,
kArithmeticImm);
case IrOpcode::kInt64LessThanOrEqual:
cont.OverwriteAndNegateIfEqual(kSignedLessThanOrEqual);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false,
kArithmeticImm);
case IrOpcode::kUint64LessThan:
cont.OverwriteAndNegateIfEqual(kUnsignedLessThan);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false);
return VisitWordCompare(this, value, kArm64Cmp, &cont, false,
kArithmeticImm);
case IrOpcode::kFloat64Equal:
cont.OverwriteAndNegateIfEqual(kUnorderedEqual);
return VisitFloat64Compare(this, value, &cont);
@ -1145,11 +1149,14 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
}
break;
case IrOpcode::kInt32Add:
return VisitWordCompare(this, value, kArm64Cmn32, &cont, true);
return VisitWordCompare(this, value, kArm64Cmn32, &cont, true,
kArithmeticImm);
case IrOpcode::kInt32Sub:
return VisitWordCompare(this, value, kArm64Cmp32, &cont, false);
return VisitWordCompare(this, value, kArm64Cmp32, &cont, false,
kArithmeticImm);
case IrOpcode::kWord32And:
return VisitWordCompare(this, value, kArm64Tst32, &cont, true);
return VisitWordCompare(this, value, kArm64Tst32, &cont, true,
kLogical32Imm);
default:
break;
}
@ -1169,11 +1176,14 @@ void InstructionSelector::VisitWord32Equal(Node* const node) {
if (CanCover(user, value)) {
switch (value->opcode()) {
case IrOpcode::kInt32Add:
return VisitWordCompare(this, value, kArm64Cmn32, &cont, true);
return VisitWordCompare(this, value, kArm64Cmn32, &cont, true,
kArithmeticImm);
case IrOpcode::kInt32Sub:
return VisitWordCompare(this, value, kArm64Cmp32, &cont, false);
return VisitWordCompare(this, value, kArm64Cmp32, &cont, false,
kArithmeticImm);
case IrOpcode::kWord32And:
return VisitWordCompare(this, value, kArm64Tst32, &cont, true);
return VisitWordCompare(this, value, kArm64Tst32, &cont, true,
kLogical32Imm);
default:
break;
}
@ -1217,14 +1227,15 @@ void InstructionSelector::VisitWord64Equal(Node* const node) {
if (CanCover(user, value)) {
switch (value->opcode()) {
case IrOpcode::kWord64And:
return VisitWordCompare(this, value, kArm64Tst, &cont, true);
return VisitWordCompare(this, value, kArm64Tst, &cont, true,
kLogical64Imm);
default:
break;
}
return VisitWord64Test(this, value, &cont);
}
}
VisitWordCompare(this, node, kArm64Cmp, &cont, false);
VisitWordCompare(this, node, kArm64Cmp, &cont, false, kArithmeticImm);
}
@ -1252,19 +1263,19 @@ void InstructionSelector::VisitInt32SubWithOverflow(Node* node) {
void InstructionSelector::VisitInt64LessThan(Node* node) {
FlagsContinuation cont(kSignedLessThan, node);
VisitWordCompare(this, node, kArm64Cmp, &cont, false);
VisitWordCompare(this, node, kArm64Cmp, &cont, false, kArithmeticImm);
}
void InstructionSelector::VisitInt64LessThanOrEqual(Node* node) {
FlagsContinuation cont(kSignedLessThanOrEqual, node);
VisitWordCompare(this, node, kArm64Cmp, &cont, false);
VisitWordCompare(this, node, kArm64Cmp, &cont, false, kArithmeticImm);
}
void InstructionSelector::VisitUint64LessThan(Node* node) {
FlagsContinuation cont(kUnsignedLessThan, node);
VisitWordCompare(this, node, kArm64Cmp, &cont, false);
VisitWordCompare(this, node, kArm64Cmp, &cont, false, kArithmeticImm);
}

4
test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc
View File

@ -633,6 +633,8 @@ TEST_F(InstructionSelectorTest, AndBranchWithImmediateOnRight) {
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
EXPECT_EQ(kArm64Tst32, s[0]->arch_opcode());
EXPECT_EQ(4U, s[0]->InputCount());
EXPECT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
EXPECT_EQ(kFlags_branch, s[0]->flags_mode());
EXPECT_EQ(kNotEqual, s[0]->flags_condition());
}
@ -687,6 +689,8 @@ TEST_F(InstructionSelectorTest, AndBranchWithImmediateOnLeft) {
Stream s = m.Build();
ASSERT_EQ(1U, s.size());
EXPECT_EQ(kArm64Tst32, s[0]->arch_opcode());
EXPECT_EQ(4U, s[0]->InputCount());
EXPECT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
ASSERT_LE(1U, s[0]->InputCount());
EXPECT_EQ(kFlags_branch, s[0]->flags_mode());
EXPECT_EQ(kNotEqual, s[0]->flags_condition());