[riscv64] Port [sparkplug][arm][arm64[ia32] Callee-saved registers for RecordWrite
- 2944844: [sparkplug][arm][arm64[ia32] Callee-saved registers for RecordWrite - Delete kTestReg due to 2945538 - 2949104: [runtime] Rename Builtins::Name to Builtin Change-Id: I33d12df7cbee6842a05c1dbe3e6158be1ff4cbc7 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2952865 Commit-Queue: Yahan Lu <yahan@iscas.ac.cn> Reviewed-by: Brice Dobry <brice.dobry@futurewei.com> Reviewed-by: Ji Qiu <qiuji@iscas.ac.cn> Cr-Commit-Position: refs/heads/master@{#75168}
This commit is contained in:
Lu Yahan
V8 LUCI CQ
parent
8796b0eaf6
commit
88f4ca2b5a
@ -12,7 +12,6 @@ namespace v8 {
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namespace internal {
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namespace baseline {
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constexpr Register kTestReg = t0;
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class BaselineAssembler::ScratchRegisterScope {
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public:
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explicit ScratchRegisterScope(BaselineAssembler* assembler)
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@ -481,9 +480,7 @@ void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
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Register value) {
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// FIXME(riscv64): riscv64 don't implement pointer compressed
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__ Sd(value, FieldMemOperand(target, offset));
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ScratchRegisterScope temps(this);
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Register tmp = temps.AcquireScratch();
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__ RecordWriteField(target, offset, value, tmp, kRAHasNotBeenSaved,
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__ RecordWriteField(target, offset, value, kRAHasNotBeenSaved,
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SaveFPRegsMode::kIgnore);
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}
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void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
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@ -344,13 +344,14 @@ void Builtins::Generate_ResumeGeneratorTrampoline(MacroAssembler* masm) {
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// -- a1 : the JSGeneratorObject to resume
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// -- ra : return address
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// -----------------------------------
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__ AssertGeneratorObject(a1);
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// Store input value into generator object.
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__ StoreTaggedField(
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a0, FieldMemOperand(a1, JSGeneratorObject::kInputOrDebugPosOffset));
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__ RecordWriteField(a1, JSGeneratorObject::kInputOrDebugPosOffset, a0, a3,
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__ RecordWriteField(a1, JSGeneratorObject::kInputOrDebugPosOffset, a0,
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kRAHasNotBeenSaved, SaveFPRegsMode::kIgnore);
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// Check that a1 is still valid, RecordWrite might have clobbered it.
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__ AssertGeneratorObject(a1);
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// Load suspended function and context.
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__ LoadTaggedPointerField(
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@ -807,11 +808,12 @@ static void ReplaceClosureCodeWithOptimizedCode(MacroAssembler* masm,
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Register closure,
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Register scratch1,
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Register scratch2) {
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DCHECK(!AreAliased(optimized_code, closure));
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// Store code entry in the closure.
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__ StoreTaggedField(optimized_code,
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FieldMemOperand(closure, JSFunction::kCodeOffset));
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__ Move(scratch1, optimized_code); // Write barrier clobbers scratch1 below.
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__ RecordWriteField(closure, JSFunction::kCodeOffset, scratch1, scratch2,
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__ RecordWriteField(closure, JSFunction::kCodeOffset, scratch1,
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kRAHasNotBeenSaved, SaveFPRegsMode::kIgnore,
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RememberedSetAction::kOmit, SmiCheck::kOmit);
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}
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@ -1019,6 +1021,7 @@ static void AdvanceBytecodeOffsetOrReturn(MacroAssembler* masm,
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static void LoadOptimizationStateAndJumpIfNeedsProcessing(
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MacroAssembler* masm, Register optimization_state, Register feedback_vector,
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Label* has_optimized_code_or_marker) {
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DCHECK(!AreAliased(optimization_state, feedback_vector));
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__ RecordComment("[ Check optimization state");
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UseScratchRegisterScope temps(masm);
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Register scratch = temps.Acquire();
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@ -1034,6 +1037,7 @@ static void LoadOptimizationStateAndJumpIfNeedsProcessing(
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static void MaybeOptimizeCodeOrTailCallOptimizedCodeSlot(
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MacroAssembler* masm, Register optimization_state,
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Register feedback_vector) {
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DCHECK(!AreAliased(optimization_state, feedback_vector));
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UseScratchRegisterScope temps(masm);
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temps.Include(t0, t1);
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Label maybe_has_optimized_code;
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@ -39,7 +39,7 @@ void StaticCallInterfaceDescriptor<DerivedDescriptor>::
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// static
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constexpr auto WriteBarrierDescriptor::registers() {
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return RegisterArray(a0, a1, a2, a3);
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return RegisterArray(a1, a5, a4, a2, a0, a3);
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}
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// static
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@ -168,48 +168,40 @@ int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
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// The register 'object' contains a heap object pointer. The heap object
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// tag is shifted away.
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void MacroAssembler::RecordWriteField(Register object, int offset,
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Register value, Register dst,
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RAStatus ra_status,
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Register value, RAStatus ra_status,
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SaveFPRegsMode save_fp,
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RememberedSetAction remembered_set_action,
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SmiCheck smi_check) {
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DCHECK(!AreAliased(object, value));
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// First, check if a write barrier is even needed. The tests below
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// catch stores of Smis.
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Label done;
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// Skip barrier if writing a smi.
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// Skip the barrier if writing a smi.
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if (smi_check == SmiCheck::kInline) {
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JumpIfSmi(value, &done);
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}
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// Although the object register is tagged, the offset is relative to the start
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// of the object, so so offset must be a multiple of kSystemPointerSize.
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// of the object, so offset must be a multiple of kTaggedSize.
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DCHECK(IsAligned(offset, kTaggedSize));
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Add64(dst, object, Operand(offset - kHeapObjectTag));
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if (FLAG_debug_code) {
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Label ok;
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UseScratchRegisterScope temps(this);
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Register scratch = temps.Acquire();
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BlockTrampolinePoolScope block_trampoline_pool(this);
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Label ok;
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DCHECK(!AreAliased(value, dst, scratch, object));
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And(scratch, dst, Operand(kTaggedSize - 1));
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DCHECK(!AreAliased(object, value, scratch));
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Add64(scratch, object, offset - kHeapObjectTag);
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And(scratch, scratch, Operand(kTaggedSize - 1));
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BranchShort(&ok, eq, scratch, Operand(zero_reg));
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ebreak();
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Abort(AbortReason::kUnalignedCellInWriteBarrier);
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bind(&ok);
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}
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RecordWrite(object, dst, value, ra_status, save_fp, remembered_set_action,
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SmiCheck::kOmit);
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RecordWrite(object, Operand(offset - kHeapObjectTag), value, ra_status,
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save_fp, remembered_set_action, SmiCheck::kOmit);
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bind(&done);
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// Clobber clobbered input registers when running with the debug-code flag
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// turned on to provoke errors.
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if (FLAG_debug_code) {
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li(value, Operand(bit_cast<int64_t>(kZapValue + 4)));
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li(dst, Operand(bit_cast<int64_t>(kZapValue + 8)));
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}
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}
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void TurboAssembler::MaybeSaveRegisters(RegList registers) {
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@ -294,15 +286,14 @@ void TurboAssembler::CallRecordWriteStub(
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wasm::WasmCode::GetRecordWriteStub(remembered_set_action, fp_mode);
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Call(wasm_target, RelocInfo::WASM_STUB_CALL);
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} else {
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auto builtin_index =
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Builtins::GetRecordWriteStub(remembered_set_action, fp_mode);
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auto builtin = Builtins::GetRecordWriteStub(remembered_set_action, fp_mode);
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if (options().inline_offheap_trampolines) {
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// Inline the trampoline. //qj
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DCHECK(Builtins::IsBuiltinId(builtin_index));
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RecordCommentForOffHeapTrampoline(builtin_index);
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CHECK_NE(builtin_index, Builtin::kNoBuiltinId);
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DCHECK(Builtins::IsBuiltinId(builtin));
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RecordCommentForOffHeapTrampoline(builtin);
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CHECK_NE(builtin, Builtin::kNoBuiltinId);
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EmbeddedData d = EmbeddedData::FromBlob();
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Address entry = d.InstructionStartOfBuiltin(builtin_index);
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Address entry = d.InstructionStartOfBuiltin(builtin);
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UseScratchRegisterScope temps(this);
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BlockTrampolinePoolScope block_trampoline_pool(this);
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@ -310,8 +301,7 @@ void TurboAssembler::CallRecordWriteStub(
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li(scratch, Operand(entry, RelocInfo::OFF_HEAP_TARGET));
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Call(scratch);
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} else {
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Handle<Code> code_target =
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isolate()->builtins()->code_handle(builtin_index);
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Handle<Code> code_target = isolate()->builtins()->code_handle(builtin);
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Call(code_target, RelocInfo::CODE_TARGET);
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}
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}
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@ -320,17 +310,21 @@ void TurboAssembler::CallRecordWriteStub(
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// Clobbers object, address, value, and ra, if (ra_status == kRAHasBeenSaved)
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// The register 'object' contains a heap object pointer. The heap object
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// tag is shifted away.
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void MacroAssembler::RecordWrite(Register object, Register address,
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void MacroAssembler::RecordWrite(Register object, Operand offset,
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Register value, RAStatus ra_status,
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SaveFPRegsMode fp_mode,
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RememberedSetAction remembered_set_action,
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SmiCheck smi_check) {
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DCHECK(!AreAliased(object, address, value));
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DCHECK(!AreAliased(object, value));
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if (FLAG_debug_code) {
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DCHECK(!AreAliased(object, address, value, kScratchReg));
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LoadTaggedPointerField(kScratchReg, MemOperand(address));
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Assert(eq, AbortReason::kWrongAddressOrValuePassedToRecordWrite,
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kScratchReg, Operand(value));
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UseScratchRegisterScope temps(this);
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Register temp = temps.Acquire();
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DCHECK(!AreAliased(object, value, temp));
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Add64(temp, object, offset);
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LoadTaggedPointerField(temp, MemOperand(temp));
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Assert(eq, AbortReason::kWrongAddressOrValuePassedToRecordWrite, temp,
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Operand(value));
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}
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if ((remembered_set_action == RememberedSetAction::kOmit &&
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@ -348,31 +342,39 @@ void MacroAssembler::RecordWrite(Register object, Register address,
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JumpIfSmi(value, &done);
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}
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CheckPageFlag(value,
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value, // Used as scratch.
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MemoryChunk::kPointersToHereAreInterestingMask, eq, &done);
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CheckPageFlag(object,
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value, // Used as scratch.
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MemoryChunk::kPointersFromHereAreInterestingMask, eq, &done);
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{
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UseScratchRegisterScope temps(this);
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Register temp = temps.Acquire();
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CheckPageFlag(value,
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temp, // Used as scratch.
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MemoryChunk::kPointersToHereAreInterestingMask,
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eq, // In RISC-V, it uses cc for a comparison with 0, so if
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// no bits are set, and cc is eq, it will branch to done
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&done);
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CheckPageFlag(object,
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temp, // Used as scratch.
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MemoryChunk::kPointersFromHereAreInterestingMask,
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eq, // In RISC-V, it uses cc for a comparison with 0, so if
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// no bits are set, and cc is eq, it will branch to done
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&done);
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}
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// Record the actual write.
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if (ra_status == kRAHasNotBeenSaved) {
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push(ra);
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}
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CallRecordWriteStubSaveRegisters(object, address, remembered_set_action,
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fp_mode);
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Register slot_address = WriteBarrierDescriptor::SlotAddressRegister();
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DCHECK(!AreAliased(object, slot_address, value));
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// TODO(cbruni): Turn offset into int.
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DCHECK(offset.IsImmediate());
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Add64(slot_address, object, offset);
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CallRecordWriteStub(object, slot_address, remembered_set_action, fp_mode);
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if (ra_status == kRAHasNotBeenSaved) {
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pop(ra);
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}
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if (FLAG_debug_code) li(slot_address, Operand(kZapValue));
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bind(&done);
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// Clobber clobbered registers when running with the debug-code flag
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// turned on to provoke errors.
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if (FLAG_debug_code) {
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li(address, Operand(bit_cast<int64_t>(kZapValue + 12)));
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li(value, Operand(bit_cast<int64_t>(kZapValue + 16)));
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}
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}
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// ---------------------------------------------------------------------------
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@ -2994,10 +2996,10 @@ void TurboAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,
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DCHECK(RelocInfo::IsCodeTarget(rmode));
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BlockTrampolinePoolScope block_trampoline_pool(this);
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int builtin_index = Builtin::kNoBuiltinId;
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Builtin builtin = Builtin::kNoBuiltinId;
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bool target_is_isolate_independent_builtin =
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isolate()->builtins()->IsBuiltinHandle(code, &builtin_index) &&
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Builtins::IsIsolateIndependent(builtin_index);
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isolate()->builtins()->IsBuiltinHandle(code, &builtin) &&
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Builtins::IsIsolateIndependent(builtin);
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if (target_is_isolate_independent_builtin &&
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options().use_pc_relative_calls_and_jumps) {
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int32_t code_target_index = AddCodeTarget(code);
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@ -3020,10 +3022,10 @@ void TurboAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,
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} else if (options().inline_offheap_trampolines &&
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target_is_isolate_independent_builtin) {
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// Inline the trampoline.
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RecordCommentForOffHeapTrampoline(builtin_index);
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CHECK_NE(builtin_index, Builtin::kNoBuiltinId);
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RecordCommentForOffHeapTrampoline(builtin);
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CHECK_NE(builtin, Builtin::kNoBuiltinId);
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EmbeddedData d = EmbeddedData::FromBlob();
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Address entry = d.InstructionStartOfBuiltin(builtin_index);
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Address entry = d.InstructionStartOfBuiltin(builtin);
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li(t6, Operand(entry, RelocInfo::OFF_HEAP_TARGET));
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Jump(t6, cond, rs, rt);
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return;
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@ -3074,16 +3076,16 @@ void TurboAssembler::Call(Address target, RelocInfo::Mode rmode, Condition cond,
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void TurboAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode,
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Condition cond, Register rs, const Operand& rt) {
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int builtin_index = Builtin::kNoBuiltinId;
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Builtin builtin = Builtin::kNoBuiltinId;
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bool target_is_isolate_independent_builtin =
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isolate()->builtins()->IsBuiltinHandle(code, &builtin_index) &&
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Builtins::IsIsolateIndependent(builtin_index);
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isolate()->builtins()->IsBuiltinHandle(code, &builtin) &&
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Builtins::IsIsolateIndependent(builtin);
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if (target_is_isolate_independent_builtin &&
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options().use_pc_relative_calls_and_jumps) {
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int32_t code_target_index = AddCodeTarget(code);
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Label skip;
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BlockTrampolinePoolScope block_trampoline_pool(this);
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RecordCommentForOffHeapTrampoline(builtin_index);
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RecordCommentForOffHeapTrampoline(builtin);
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if (cond != al) {
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Branch(&skip, NegateCondition(cond), rs, rt);
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}
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@ -3102,10 +3104,10 @@ void TurboAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode,
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} else if (options().inline_offheap_trampolines &&
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target_is_isolate_independent_builtin) {
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// Inline the trampoline.
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RecordCommentForOffHeapTrampoline(builtin_index);
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CHECK_NE(builtin_index, Builtin::kNoBuiltinId);
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RecordCommentForOffHeapTrampoline(builtin);
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CHECK_NE(builtin, Builtin::kNoBuiltinId);
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EmbeddedData d = EmbeddedData::FromBlob();
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Address entry = d.InstructionStartOfBuiltin(builtin_index);
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Address entry = d.InstructionStartOfBuiltin(builtin);
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li(t6, Operand(entry, RelocInfo::OFF_HEAP_TARGET));
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Call(t6, cond, rs, rt);
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return;
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@ -3117,30 +3119,28 @@ void TurboAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode,
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Call(static_cast<Address>(target_index), rmode, cond, rs, rt);
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}
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void TurboAssembler::LoadEntryFromBuiltinIndex(Register builtin_index) {
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void TurboAssembler::LoadEntryFromBuiltinIndex(Register builtin) {
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STATIC_ASSERT(kSystemPointerSize == 8);
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STATIC_ASSERT(kSmiTagSize == 1);
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STATIC_ASSERT(kSmiTag == 0);
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// The builtin_index register contains the builtin index as a Smi.
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SmiUntag(builtin_index, builtin_index);
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CalcScaledAddress(builtin_index, kRootRegister, builtin_index,
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kSystemPointerSizeLog2);
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Ld(builtin_index,
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MemOperand(builtin_index, IsolateData::builtin_entry_table_offset()));
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// The builtin register contains the builtin index as a Smi.
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SmiUntag(builtin, builtin);
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CalcScaledAddress(builtin, kRootRegister, builtin, kSystemPointerSizeLog2);
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Ld(builtin, MemOperand(builtin, IsolateData::builtin_entry_table_offset()));
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}
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void TurboAssembler::CallBuiltinByIndex(Register builtin_index) {
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LoadEntryFromBuiltinIndex(builtin_index);
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Call(builtin_index);
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void TurboAssembler::CallBuiltinByIndex(Register builtin) {
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LoadEntryFromBuiltinIndex(builtin);
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Call(builtin);
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}
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void TurboAssembler::CallBuiltin(int builtin_index) {
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DCHECK(Builtins::IsBuiltinId(builtin_index));
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RecordCommentForOffHeapTrampoline(builtin_index);
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CHECK_NE(builtin_index, Builtin::kNoBuiltinId);
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void TurboAssembler::CallBuiltin(Builtin builtin) {
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DCHECK(Builtins::IsBuiltinId(builtin));
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RecordCommentForOffHeapTrampoline(builtin);
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CHECK_NE(builtin, Builtin::kNoBuiltinId);
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EmbeddedData d = EmbeddedData::FromBlob(isolate());
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Address entry = d.InstructionStartOfBuiltin(builtin_index);
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Address entry = d.InstructionStartOfBuiltin(builtin);
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if (options().short_builtin_calls) {
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Call(entry, RelocInfo::RUNTIME_ENTRY);
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} else {
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@ -3149,12 +3149,12 @@ void TurboAssembler::CallBuiltin(int builtin_index) {
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RecordComment("]");
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}
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void TurboAssembler::TailCallBuiltin(int builtin_index) {
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DCHECK(Builtins::IsBuiltinId(builtin_index));
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RecordCommentForOffHeapTrampoline(builtin_index);
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CHECK_NE(builtin_index, Builtin::kNoBuiltinId);
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void TurboAssembler::TailCallBuiltin(Builtin builtin) {
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DCHECK(Builtins::IsBuiltinId(builtin));
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RecordCommentForOffHeapTrampoline(builtin);
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CHECK_NE(builtin, Builtin::kNoBuiltinId);
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EmbeddedData d = EmbeddedData::FromBlob(isolate());
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Address entry = d.InstructionStartOfBuiltin(builtin_index);
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Address entry = d.InstructionStartOfBuiltin(builtin);
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if (options().short_builtin_calls) {
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Jump(entry, RelocInfo::RUNTIME_ENTRY);
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} else {
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@ -3163,15 +3163,15 @@ void TurboAssembler::TailCallBuiltin(int builtin_index) {
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RecordComment("]");
|
||||
}
|
||||
|
||||
void TurboAssembler::LoadEntryFromBuiltin(Builtin builtin_index,
|
||||
void TurboAssembler::LoadEntryFromBuiltin(Builtin builtin,
|
||||
Register destination) {
|
||||
Ld(destination, EntryFromBuiltinAsOperand(builtin_index));
|
||||
Ld(destination, EntryFromBuiltinAsOperand(builtin));
|
||||
}
|
||||
|
||||
MemOperand TurboAssembler::EntryFromBuiltinAsOperand(Builtin builtin_index) {
|
||||
MemOperand TurboAssembler::EntryFromBuiltinAsOperand(Builtin builtin) {
|
||||
DCHECK(root_array_available());
|
||||
return MemOperand(kRootRegister,
|
||||
IsolateData::builtin_entry_slot_offset(builtin_index));
|
||||
IsolateData::builtin_entry_slot_offset(builtin));
|
||||
}
|
||||
|
||||
void TurboAssembler::PatchAndJump(Address target) {
|
||||
@ -4656,9 +4656,11 @@ void TurboAssembler::LoadCodeObjectEntry(Register destination,
|
||||
// * Codegen at runtime does not have this restriction and we can use the
|
||||
// shorter, branchless instruction sequence. The assumption here is that
|
||||
// targets are usually generated code and not builtin Code objects.
|
||||
|
||||
if (options().isolate_independent_code) {
|
||||
DCHECK(root_array_available());
|
||||
Label if_code_is_off_heap, no_builtin_index, out;
|
||||
|
||||
UseScratchRegisterScope temps(this);
|
||||
Register scratch = temps.Acquire();
|
||||
|
||||
@ -4668,6 +4670,7 @@ void TurboAssembler::LoadCodeObjectEntry(Register destination,
|
||||
// Check whether the Code object is an off-heap trampoline. If so, call its
|
||||
// (off-heap) entry point directly without going through the (on-heap)
|
||||
// trampoline. Otherwise, just call the Code object as always.
|
||||
|
||||
Lw(scratch, FieldMemOperand(code_object, Code::kFlagsOffset));
|
||||
Branch(&if_code_is_off_heap, ne, scratch,
|
||||
Operand(Code::IsOffHeapTrampoline::kMask));
|
||||
@ -4682,7 +4685,8 @@ void TurboAssembler::LoadCodeObjectEntry(Register destination,
|
||||
bind(&if_code_is_off_heap);
|
||||
Lw(scratch, FieldMemOperand(code_object, Code::kBuiltinIndexOffset));
|
||||
// TODO(RISCV): https://github.com/v8-riscv/v8/issues/373
|
||||
Branch(&no_builtin_index, eq, scratch, Operand(Builtin::kNoBuiltinId));
|
||||
Branch(&no_builtin_index, eq, scratch,
|
||||
Operand(static_cast<int>(Builtin::kNoBuiltinId)));
|
||||
slli(destination, scratch, kSystemPointerSizeLog2);
|
||||
Add64(destination, destination, kRootRegister);
|
||||
Ld(destination,
|
||||
|
||||
@ -229,22 +229,14 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
|
||||
Register dst, Label* target,
|
||||
RelocInfo::Mode rmode = RelocInfo::INTERNAL_REFERENCE_ENCODED);
|
||||
|
||||
// Load the builtin given by the Smi in |builtin_index| into the same
|
||||
// Load the builtin given by the Smi in |builtin| into the same
|
||||
// register.
|
||||
void LoadEntryFromBuiltinIndex(Register builtin_index);
|
||||
void LoadEntryFromBuiltin(Builtin builtin_index, Register destination);
|
||||
MemOperand EntryFromBuiltinAsOperand(Builtin builtin_index);
|
||||
void CallBuiltinByIndex(Register builtin_index);
|
||||
void CallBuiltin(Builtin builtin) {
|
||||
// TODO(11527): drop the int overload in favour of the Builtin one.
|
||||
return CallBuiltin(static_cast<int>(builtin));
|
||||
}
|
||||
void CallBuiltin(int builtin_index);
|
||||
void TailCallBuiltin(Builtin builtin) {
|
||||
// TODO(11527): drop the int overload in favour of the Builtin one.
|
||||
return TailCallBuiltin(static_cast<int>(builtin));
|
||||
}
|
||||
void TailCallBuiltin(int builtin_index);
|
||||
void LoadEntryFromBuiltinIndex(Register builtin);
|
||||
void LoadEntryFromBuiltin(Builtin builtin, Register destination);
|
||||
MemOperand EntryFromBuiltinAsOperand(Builtin builtin);
|
||||
void CallBuiltinByIndex(Register builtin);
|
||||
void CallBuiltin(Builtin builtin);
|
||||
void TailCallBuiltin(Builtin builtin);
|
||||
|
||||
void LoadCodeObjectEntry(Register destination, Register code_object);
|
||||
void CallCodeObject(Register code_object);
|
||||
@ -1011,8 +1003,8 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
|
||||
// The offset is the offset from the start of the object, not the offset from
|
||||
// the tagged HeapObject pointer. For use with FieldOperand(reg, off).
|
||||
void RecordWriteField(
|
||||
Register object, int offset, Register value, Register scratch,
|
||||
RAStatus ra_status, SaveFPRegsMode save_fp,
|
||||
Register object, int offset, Register value, RAStatus ra_status,
|
||||
SaveFPRegsMode save_fp,
|
||||
RememberedSetAction remembered_set_action = RememberedSetAction::kEmit,
|
||||
SmiCheck smi_check = SmiCheck::kInline);
|
||||
|
||||
@ -1020,7 +1012,7 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
|
||||
// has been written. |value| is the object being stored. The value and
|
||||
// address registers are clobbered by the operation.
|
||||
void RecordWrite(
|
||||
Register object, Register address, Register value, RAStatus ra_status,
|
||||
Register object, Operand offset, Register value, RAStatus ra_status,
|
||||
SaveFPRegsMode save_fp,
|
||||
RememberedSetAction remembered_set_action = RememberedSetAction::kEmit,
|
||||
SmiCheck smi_check = SmiCheck::kInline);
|
||||
|
||||
@ -2431,7 +2431,6 @@ void CodeGenerator::FinishFrame(Frame* frame) {
|
||||
const RegList saves = call_descriptor->CalleeSavedRegisters();
|
||||
if (saves != 0) {
|
||||
int count = base::bits::CountPopulation(saves);
|
||||
DCHECK_EQ(kNumCalleeSaved, count + 1);
|
||||
frame->AllocateSavedCalleeRegisterSlots(count);
|
||||
}
|
||||
}
|
||||
@ -2550,7 +2549,6 @@ void CodeGenerator::AssembleConstructFrame() {
|
||||
if (saves != 0) {
|
||||
// Save callee-saved registers.
|
||||
__ MultiPush(saves);
|
||||
DCHECK_EQ(kNumCalleeSaved, base::bits::CountPopulation(saves) + 1);
|
||||
}
|
||||
|
||||
if (returns != 0) {
|
||||
|
||||
@ -3449,7 +3449,7 @@ void Simulator::InstructionDecode(Instruction* instr) {
|
||||
DecodeCSType();
|
||||
break;
|
||||
default:
|
||||
if (::v8::internal::FLAG_trace_sim) {
|
||||
if (1) {
|
||||
std::cout << "Unrecognized instruction [@pc=0x" << std::hex
|
||||
<< registers_[pc] << "]: 0x" << instr->InstructionBits()
|
||||
<< std::endl;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user