diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc index 7e7456e78f..45465119b3 100644 --- a/src/arm/assembler-arm.cc +++ b/src/arm/assembler-arm.cc @@ -1587,14 +1587,6 @@ void Assembler::smmla(Register dst, Register src1, Register src2, Register srcA, } -void Assembler::smmls(Register dst, Register src1, Register src2, Register srcA, - Condition cond) { - DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc)); - emit(cond | B26 | B25 | B24 | B22 | B20 | dst.code() * B16 | - srcA.code() * B12 | src2.code() * B8 | B7 | B6 | B4 | src1.code()); -} - - void Assembler::smmul(Register dst, Register src1, Register src2, Condition cond) { DCHECK(!dst.is(pc) && !src1.is(pc) && !src2.is(pc)); diff --git a/src/arm/assembler-arm.h b/src/arm/assembler-arm.h index a87873d846..f78cc50b38 100644 --- a/src/arm/assembler-arm.h +++ b/src/arm/assembler-arm.h @@ -978,9 +978,6 @@ class Assembler : public AssemblerBase { void smmla(Register dst, Register src1, Register src2, Register srcA, Condition cond = al); - void smmls(Register dst, Register src1, Register src2, Register srcA, - Condition cond = al); - void smmul(Register dst, Register src1, Register src2, Condition cond = al); void smlal(Register dstL, Register dstH, Register src1, Register src2, diff --git a/src/arm/disasm-arm.cc b/src/arm/disasm-arm.cc index deaf552acc..2af6112a81 100644 --- a/src/arm/disasm-arm.cc +++ b/src/arm/disasm-arm.cc @@ -1097,11 +1097,6 @@ void Decoder::DecodeType3(Instruction* instr) { } case db_x: { if (instr->Bits(22, 20) == 0x5) { - if (instr->Bits(7, 4) == 0xd) { - // SMMLS (in V8 notation matching ARM ISA format) - Format(instr, "smmls'cond 'rn, 'rm, 'rs, 'rd"); - break; - } if (instr->Bits(7, 4) == 0x1) { if (instr->Bits(15, 12) == 0xF) { Format(instr, "smmul'cond 'rn, 'rm, 'rs"); diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc index df06765673..5105f1edb8 100644 --- a/src/arm/simulator-arm.cc +++ b/src/arm/simulator-arm.cc @@ -2711,19 +2711,6 @@ void Simulator::DecodeType3(Instruction* instr) { } case db_x: { if (instr->Bits(22, 20) == 0x5) { - if (instr->Bits(7, 4) == 0xd) { - // SMMLS (in V8 notation matching ARM ISA format) - // Format(instr, "smmls'cond 'rn, 'rm, 'rs, 'rd"); - int rm = instr->RmValue(); - int32_t rm_val = get_register(rm); - int rs = instr->RsValue(); - int32_t rs_val = get_register(rs); - int rd = instr->RdValue(); - int32_t rd_val = get_register(rd); - rn_val = base::bits::SignedMulHighAndSub32(rm_val, rs_val, rd_val); - set_register(rn, rn_val); - return; - } if (instr->Bits(7, 4) == 0x1) { int rm = instr->RmValue(); int32_t rm_val = get_register(rm); diff --git a/src/base/bits.cc b/src/base/bits.cc index 7a3fb6d331..2818b939aa 100644 --- a/src/base/bits.cc +++ b/src/base/bits.cc @@ -32,13 +32,6 @@ int32_t SignedMulHighAndAdd32(int32_t lhs, int32_t rhs, int32_t acc) { bit_cast(SignedMulHigh32(lhs, rhs))); } - -int32_t SignedMulHighAndSub32(int32_t lhs, int32_t rhs, int32_t acc) { - return bit_cast(bit_cast(acc) - - bit_cast(SignedMulHigh32(lhs, rhs))); -} - - } // namespace bits } // namespace base } // namespace v8 diff --git a/src/base/bits.h b/src/base/bits.h index e094882431..5e0e248a02 100644 --- a/src/base/bits.h +++ b/src/base/bits.h @@ -199,12 +199,6 @@ int32_t SignedMulHigh32(int32_t lhs, int32_t rhs); // adds the accumulate value |acc|. int32_t SignedMulHighAndAdd32(int32_t lhs, int32_t rhs, int32_t acc); - -// SignedMulHighAndAdd32(lhs, rhs, acc) multiplies two signed 32-bit values -// |lhs| and |rhs|, extracts the most significant 32 bits of the result, and -// subtracts it from the accumulate value |acc|. -int32_t SignedMulHighAndSub32(int32_t lhs, int32_t rhs, int32_t acc); - } // namespace bits } // namespace base } // namespace v8 diff --git a/test/cctest/test-assembler-arm.cc b/test/cctest/test-assembler-arm.cc index f19d68cb5e..8c1a4d9410 100644 --- a/test/cctest/test-assembler-arm.cc +++ b/test/cctest/test-assembler-arm.cc @@ -1524,32 +1524,6 @@ TEST(smmla) { } -TEST(smmls) { - CcTest::InitializeVM(); - Isolate* const isolate = CcTest::i_isolate(); - HandleScope scope(isolate); - RandomNumberGenerator* const rng = isolate->random_number_generator(); - Assembler assm(isolate, nullptr, 0); - __ smmls(r1, r1, r2, r3); - __ str(r1, MemOperand(r0)); - __ bx(lr); - CodeDesc desc; - assm.GetCode(&desc); - Handle code = isolate->factory()->NewCode( - desc, Code::ComputeFlags(Code::STUB), Handle()); -#ifdef OBJECT_PRINT - code->Print(std::cout); -#endif - F3 f = FUNCTION_CAST(code->entry()); - for (size_t i = 0; i < 128; ++i) { - int32_t r, x = rng->NextInt(), y = rng->NextInt(), z = rng->NextInt(); - Object* dummy = CALL_GENERATED_CODE(f, &r, x, y, z, 0); - CHECK_EQ(bits::SignedMulHighAndSub32(x, y, z), r); - USE(dummy); - } -} - - TEST(smmul) { CcTest::InitializeVM(); Isolate* const isolate = CcTest::i_isolate(); diff --git a/test/cctest/test-disasm-arm.cc b/test/cctest/test-disasm-arm.cc index 3de3550934..1fabdc2adc 100644 --- a/test/cctest/test-disasm-arm.cc +++ b/test/cctest/test-disasm-arm.cc @@ -420,9 +420,6 @@ TEST(Type3) { "e6cf3474 uxtb16 r3, r4, ror #8"); } - COMPARE(smmls(r0, r1, r2, r3), "e75032d1 smmls r0, r1, r2, r3"); - COMPARE(smmls(r10, r9, r8, r7), "e75a78d9 smmls r10, r9, r8, r7"); - COMPARE(smmla(r0, r1, r2, r3), "e7503211 smmla r0, r1, r2, r3"); COMPARE(smmla(r10, r9, r8, r7), "e75a7819 smmla r10, r9, r8, r7"); diff --git a/test/unittests/base/bits-unittest.cc b/test/unittests/base/bits-unittest.cc index 65b0a76a01..be41007f69 100644 --- a/test/unittests/base/bits-unittest.cc +++ b/test/unittests/base/bits-unittest.cc @@ -224,17 +224,6 @@ TEST(Bits, SignedMulHighAndAdd32) { } } - -TEST(Bits, SignedMulHighAndSub32) { - TRACED_FORRANGE(int32_t, i, 1, 50) { - EXPECT_EQ(i, SignedMulHighAndSub32(0, 0, i)); - TRACED_FORRANGE(int32_t, j, 1, i) { - EXPECT_EQ(i, SignedMulHighAndSub32(j, j, i)); - } - EXPECT_EQ(i - 1, SignedMulHighAndSub32(1024 * 1024 * 1024, 4, i)); - } -} - } // namespace bits } // namespace base } // namespace v8