From 8b5173b689417f236e17e0d7340a8128267973e5 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Tue, 7 Sep 2021 15:01:43 -0700 Subject: [PATCH] [x64] Move cvtss2sd into macro list Bug: v8:11879 Change-Id: I02cfb6ca7cff418dc3e4ab422a1bc3437f0ea778 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3146075 Reviewed-by: Deepti Gandluri Commit-Queue: Zhi An Ng Cr-Commit-Position: refs/heads/main@{#76713} --- src/codegen/x64/assembler-x64.cc | 20 -------------------- src/codegen/x64/assembler-x64.h | 9 --------- src/codegen/x64/sse-instr.h | 1 + 3 files changed, 1 insertion(+), 29 deletions(-) diff --git a/src/codegen/x64/assembler-x64.cc b/src/codegen/x64/assembler-x64.cc index 95319c3ced..108f381ba7 100644 --- a/src/codegen/x64/assembler-x64.cc +++ b/src/codegen/x64/assembler-x64.cc @@ -3347,26 +3347,6 @@ void Assembler::cvtqsi2sd(XMMRegister dst, Register src) { emit_sse_operand(dst, src); } -void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { - DCHECK(!IsEnabled(AVX)); - EnsureSpace ensure_space(this); - emit(0xF3); - emit_optional_rex_32(dst, src); - emit(0x0F); - emit(0x5A); - emit_sse_operand(dst, src); -} - -void Assembler::cvtss2sd(XMMRegister dst, Operand src) { - DCHECK(!IsEnabled(AVX)); - EnsureSpace ensure_space(this); - emit(0xF3); - emit_optional_rex_32(dst, src); - emit(0x0F); - emit(0x5A); - emit_sse_operand(dst, src); -} - void Assembler::cvtsd2si(Register dst, XMMRegister src) { DCHECK(!IsEnabled(AVX)); EnsureSpace ensure_space(this); diff --git a/src/codegen/x64/assembler-x64.h b/src/codegen/x64/assembler-x64.h index 3c0d20879b..cd93c7f856 100644 --- a/src/codegen/x64/assembler-x64.h +++ b/src/codegen/x64/assembler-x64.h @@ -1242,9 +1242,6 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase { void cvtqsi2sd(XMMRegister dst, Operand src); void cvtqsi2sd(XMMRegister dst, Register src); - void cvtss2sd(XMMRegister dst, XMMRegister src); - void cvtss2sd(XMMRegister dst, Operand src); - void cvtsd2si(Register dst, XMMRegister src); void cvtsd2siq(Register dst, XMMRegister src); @@ -1438,12 +1435,6 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase { void vcvtdq2pd(XMMRegister dst, XMMRegister src) { vinstr(0xe6, dst, xmm0, src, kF3, k0F, kWIG); } - void vcvtss2sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { - vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG); - } - void vcvtss2sd(XMMRegister dst, XMMRegister src1, Operand src2) { - vinstr(0x5a, dst, src1, src2, kF3, k0F, kWIG); - } void vcvttps2dq(XMMRegister dst, XMMRegister src) { vinstr(0x5b, dst, xmm0, src, kF3, k0F, kWIG); } diff --git a/src/codegen/x64/sse-instr.h b/src/codegen/x64/sse-instr.h index 452cc0f690..d1223b69a1 100644 --- a/src/codegen/x64/sse-instr.h +++ b/src/codegen/x64/sse-instr.h @@ -32,6 +32,7 @@ V(sqrtss, F3, 0F, 51) \ V(addss, F3, 0F, 58) \ V(mulss, F3, 0F, 59) \ + V(cvtss2sd, F3, 0F, 5A) \ V(subss, F3, 0F, 5C) \ V(minss, F3, 0F, 5D) \ V(divss, F3, 0F, 5E) \