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[wasm-simd] Fix scalar lowering of shifts

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Shifts values are in register, not immediate.

Bug: v8:8934
Bug: v8:10392
Change-Id: I7fed9dcd3531ec5e2b28061f0dd1675616e19f7b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2135930
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67024}
This commit is contained in:
Ng Zhi An 2020-04-03 16:14:14 -07:00 committed by Commit Bot
parent ba4e864422
commit 8f51a74c01
2 changed files with 36 additions and 13 deletions
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31
src/compiler/simd-scalar-lowering.cc
View File

@ -26,7 +26,31 @@ static const int32_t kMask16 = 0xFFFF;
static const int32_t kMask8 = 0xFF;
static const int32_t kShift16 = 16;
static const int32_t kShift8 = 24;
} // anonymous
static const int32_t kShiftMask8 = 0x7;
static const int32_t kShiftMask16 = 0xF;
static const int32_t kShiftMask32 = 0x1F;
// Shift values are taken modulo lane size. This helper calculates the mask
// required for different shift opcodes.
int GetMaskForShift(Node* node) {
switch (node->opcode()) {
case IrOpcode::kI8x16Shl:
case IrOpcode::kI8x16ShrS:
case IrOpcode::kI8x16ShrU:
return kShiftMask8;
case IrOpcode::kI16x8Shl:
case IrOpcode::kI16x8ShrS:
case IrOpcode::kI16x8ShrU:
return kShiftMask16;
case IrOpcode::kI32x4Shl:
case IrOpcode::kI32x4ShrS:
case IrOpcode::kI32x4ShrU:
return kShiftMask32;
default:
UNIMPLEMENTED();
}
}
} // anonymous namespace
SimdScalarLowering::SimdScalarLowering(
MachineGraph* mcgraph, Signature<MachineRepresentation>* signature)
@ -934,9 +958,8 @@ void SimdScalarLowering::LowerPack(Node* node, SimdType input_rep_type,
}
void SimdScalarLowering::LowerShiftOp(Node* node, SimdType type) {
DCHECK_EQ(1, node->InputCount());
int32_t shift_amount = OpParameter<int32_t>(node->op());
Node* shift_node = graph()->NewNode(common()->Int32Constant(shift_amount));
DCHECK_EQ(2, node->InputCount());
Node* shift_node = Mask(node->InputAt(1), GetMaskForShift(node));
Node** rep = GetReplacementsWithType(node->InputAt(0), type);
int num_lanes = NumLanes(type);
Node** rep_node = zone()->NewArray<Node*>(num_lanes);

18
test/cctest/wasm/test-run-wasm-simd.cc
View File

@ -2061,17 +2061,17 @@ void RunI32x4ShiftOpTest(ExecutionTier execution_tier, LowerSimd lower_simd,
}
}
WASM_SIMD_TEST_NO_LOWERING(I32x4Shl) {
WASM_SIMD_TEST(I32x4Shl) {
RunI32x4ShiftOpTest(execution_tier, lower_simd, kExprI32x4Shl,
LogicalShiftLeft);
}
WASM_SIMD_TEST_NO_LOWERING(I32x4ShrS) {
WASM_SIMD_TEST(I32x4ShrS) {
RunI32x4ShiftOpTest(execution_tier, lower_simd, kExprI32x4ShrS,
ArithmeticShiftRight);
}
WASM_SIMD_TEST_NO_LOWERING(I32x4ShrU) {
WASM_SIMD_TEST(I32x4ShrU) {
RunI32x4ShiftOpTest(execution_tier, lower_simd, kExprI32x4ShrU,
LogicalShiftRight);
}
@ -2330,17 +2330,17 @@ void RunI16x8ShiftOpTest(ExecutionTier execution_tier, LowerSimd lower_simd,
}
}
WASM_SIMD_TEST_NO_LOWERING(I16x8Shl) {
WASM_SIMD_TEST(I16x8Shl) {
RunI16x8ShiftOpTest(execution_tier, lower_simd, kExprI16x8Shl,
LogicalShiftLeft);
}
WASM_SIMD_TEST_NO_LOWERING(I16x8ShrS) {
WASM_SIMD_TEST(I16x8ShrS) {
RunI16x8ShiftOpTest(execution_tier, lower_simd, kExprI16x8ShrS,
ArithmeticShiftRight);
}
WASM_SIMD_TEST_NO_LOWERING(I16x8ShrU) {
WASM_SIMD_TEST(I16x8ShrU) {
RunI16x8ShiftOpTest(execution_tier, lower_simd, kExprI16x8ShrU,
LogicalShiftRight);
}
@ -2564,17 +2564,17 @@ void RunI8x16ShiftOpTest(ExecutionTier execution_tier, LowerSimd lower_simd,
}
}
WASM_SIMD_TEST_NO_LOWERING(I8x16Shl) {
WASM_SIMD_TEST(I8x16Shl) {
RunI8x16ShiftOpTest(execution_tier, lower_simd, kExprI8x16Shl,
LogicalShiftLeft);
}
WASM_SIMD_TEST_NO_LOWERING(I8x16ShrS) {
WASM_SIMD_TEST(I8x16ShrS) {
RunI8x16ShiftOpTest(execution_tier, lower_simd, kExprI8x16ShrS,
ArithmeticShiftRight);
}
WASM_SIMD_TEST_NO_LOWERING(I8x16ShrU) {
WASM_SIMD_TEST(I8x16ShrU) {
RunI8x16ShiftOpTest(execution_tier, lower_simd, kExprI8x16ShrU,
LogicalShiftRight);
}