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[Liftoff] Add integer conversions

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This adds support for i32.wrap/i64, i64.extend_s/i32, and
i64.extend_u/i32.

R=titzer@chromium.org

Bug: v8:6600
Change-Id: Iaeac1d24a53d044151cb244fffe3eab04314d908
Reviewed-on: https://chromium-review.googlesource.com/962281
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: Ben Titzer <titzer@chromium.org>
Cr-Commit-Position: refs/heads/master@{#51930}
This commit is contained in:
Clemens Hammacher 2018-03-14 12:44:48 +01:00 committed by Commit Bot
parent 7f44053c9e
commit 92a37d0218
3 changed files with 25 additions and 0 deletions
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12
src/wasm/baseline/ia32/liftoff-assembler-ia32.h
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@ -696,9 +696,21 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
LiftoffRegister dst,
LiftoffRegister src) {
switch (opcode) {
case kExprI32ConvertI64:
if (dst.gp() != src.low_gp()) mov(dst.gp(), src.low_gp());
return true;
case kExprI32ReinterpretF32:
Movd(dst.gp(), src.fp());
return true;
case kExprI64SConvertI32:
if (dst.low_gp() != src.gp()) mov(dst.low_gp(), src.gp());
mov(dst.high_gp(), src.gp());
sar(dst.high_gp(), 31);
return true;
case kExprI64UConvertI32:
if (dst.low_gp() != src.gp()) mov(dst.low_gp(), src.gp());
xor_(dst.high_gp(), dst.high_gp());
return true;
case kExprI64ReinterpretF64:
// Push src to the stack.
sub(esp, Immediate(8));

3
src/wasm/baseline/liftoff-compiler.cc
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@ -625,7 +625,10 @@ class LiftoffCompiler {
CASE_FLOAT_UNOP(F32Sqrt, F32, f32_sqrt)
CASE_FLOAT_UNOP(F64Neg, F64, f64_neg)
CASE_FLOAT_UNOP(F64Sqrt, F64, f64_sqrt)
CASE_TYPE_CONVERSION(I32ConvertI64, I32, I64, nullptr)
CASE_TYPE_CONVERSION(I32ReinterpretF32, I32, F32, nullptr)
CASE_TYPE_CONVERSION(I64SConvertI32, I64, I32, nullptr)
CASE_TYPE_CONVERSION(I64UConvertI32, I64, I32, nullptr)
CASE_TYPE_CONVERSION(I64ReinterpretF64, I64, F64, nullptr)
CASE_TYPE_CONVERSION(F32SConvertI32, F32, I32, nullptr)
CASE_TYPE_CONVERSION(F32UConvertI32, F32, I32, nullptr)

10
src/wasm/baseline/x64/liftoff-assembler-x64.h
View File

@ -643,9 +643,19 @@ bool LiftoffAssembler::emit_type_conversion(WasmOpcode opcode,
LiftoffRegister dst,
LiftoffRegister src) {
switch (opcode) {
case kExprI32ConvertI64:
movl(dst.gp(), src.gp());
return true;
case kExprI32ReinterpretF32:
Movd(dst.gp(), src.fp());
return true;
case kExprI64SConvertI32:
movsxlq(dst.gp(), src.gp());
return true;
case kExprI64UConvertI32:
if (dst.gp() != src.gp()) movl(dst.gp(), src.gp());
// TODO(clemensh): Add assertion that the upper 32 bit are zero.
return true;
case kExprI64ReinterpretF64:
Movq(dst.gp(), src.fp());
return true;