From 9307f8ea307a8ad5a3be5d04e9527f85b19b2d60 Mon Sep 17 00:00:00 2001 From: "danno@chromium.org" Date: Thu, 27 Dec 2012 15:40:34 +0000 Subject: [PATCH] Fix SSE2 debug asserts in LayoutTests R=ulan@chromium.org Review URL: https://codereview.chromium.org/11675005 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13280 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/ia32/lithium-gap-resolver-ia32.cc | 48 ++++++++++++--------------- 1 file changed, 21 insertions(+), 27 deletions(-) diff --git a/src/ia32/lithium-gap-resolver-ia32.cc b/src/ia32/lithium-gap-resolver-ia32.cc index 7cb15e6eb5..6fee7fe02a 100644 --- a/src/ia32/lithium-gap-resolver-ia32.cc +++ b/src/ia32/lithium-gap-resolver-ia32.cc @@ -324,37 +324,29 @@ void LGapResolver::EmitMove(int index) { } } else if (source->IsDoubleRegister()) { - if (CpuFeatures::IsSupported(SSE2)) { - CpuFeatures::Scope scope(SSE2); - XMMRegister src = cgen_->ToDoubleRegister(source); - if (destination->IsDoubleRegister()) { - XMMRegister dst = cgen_->ToDoubleRegister(destination); - __ movaps(dst, src); - } else { - ASSERT(destination->IsDoubleStackSlot()); - Operand dst = cgen_->ToOperand(destination); - __ movdbl(dst, src); - } + CpuFeatures::Scope scope(SSE2); + XMMRegister src = cgen_->ToDoubleRegister(source); + if (destination->IsDoubleRegister()) { + XMMRegister dst = cgen_->ToDoubleRegister(destination); + __ movaps(dst, src); } else { - UNREACHABLE(); + ASSERT(destination->IsDoubleStackSlot()); + Operand dst = cgen_->ToOperand(destination); + __ movdbl(dst, src); } } else if (source->IsDoubleStackSlot()) { - if (CpuFeatures::IsSupported(SSE2)) { - CpuFeatures::Scope scope(SSE2); - ASSERT(destination->IsDoubleRegister() || - destination->IsDoubleStackSlot()); - Operand src = cgen_->ToOperand(source); - if (destination->IsDoubleRegister()) { - XMMRegister dst = cgen_->ToDoubleRegister(destination); - __ movdbl(dst, src); - } else { - // We rely on having xmm0 available as a fixed scratch register. - Operand dst = cgen_->ToOperand(destination); - __ movdbl(xmm0, src); - __ movdbl(dst, xmm0); - } + CpuFeatures::Scope scope(SSE2); + ASSERT(destination->IsDoubleRegister() || + destination->IsDoubleStackSlot()); + Operand src = cgen_->ToOperand(source); + if (destination->IsDoubleRegister()) { + XMMRegister dst = cgen_->ToDoubleRegister(destination); + __ movdbl(dst, src); } else { - UNREACHABLE(); + // We rely on having xmm0 available as a fixed scratch register. + Operand dst = cgen_->ToOperand(destination); + __ movdbl(xmm0, src); + __ movdbl(dst, xmm0); } } else { UNREACHABLE(); @@ -429,6 +421,7 @@ void LGapResolver::EmitSwap(int index) { __ movaps(dst, xmm0); } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) { + CpuFeatures::Scope scope(SSE2); // XMM register-memory swap. We rely on having xmm0 // available as a fixed scratch register. ASSERT(source->IsDoubleStackSlot() || destination->IsDoubleStackSlot()); @@ -442,6 +435,7 @@ void LGapResolver::EmitSwap(int index) { __ movdbl(reg, Operand(xmm0)); } else if (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot()) { + CpuFeatures::Scope scope(SSE2); // Double-width memory-to-memory. Spill on demand to use a general // purpose temporary register and also rely on having xmm0 available as // a fixed scratch register.