PPC: [turbofan] Run everything after representation selection concurrently.
Port d1b3d426ce
Original commit message:
Further refactor the pipeline to even run the first scheduler (part of
the effect control linearization) concurrently. This temporarily
disables most of the write barrier elimination, but we will get back to
that later.
Drive-by-fix: Remove the dead code from ChangeLowering, and stack
allocate the Typer in the pipeline. Also migrate the AllocateStub to a
native code builtin, so that we have the code object + a handle to it
available all the time.
R=bmeurer@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com
BUG=v8:4969
LOG=N
Review-Url: https://codereview.chromium.org/1941613002
Cr-Commit-Position: refs/heads/master@{#35938}
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@ -2734,6 +2734,40 @@ void Builtins::Generate_Construct(MacroAssembler* masm) {
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RelocInfo::CODE_TARGET);
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}
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// static
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void Builtins::Generate_AllocateInNewSpace(MacroAssembler* masm) {
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// ----------- S t a t e -------------
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// -- r4 : requested object size (untagged)
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// -- lr : return address
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// -----------------------------------
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Label runtime;
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__ Allocate(r4, r3, r5, r6, &runtime, NO_ALLOCATION_FLAGS);
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__ Ret();
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__ bind(&runtime);
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__ SmiTag(r4);
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__ Push(r4);
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__ LoadSmiLiteral(cp, Smi::FromInt(0));
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__ TailCallRuntime(Runtime::kAllocateInNewSpace);
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}
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// static
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void Builtins::Generate_AllocateInOldSpace(MacroAssembler* masm) {
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// ----------- S t a t e -------------
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// -- r4 : requested object size (untagged)
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// -- lr : return address
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// -----------------------------------
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Label runtime;
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__ Allocate(r4, r3, r5, r6, &runtime, PRETENURE);
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__ Ret();
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__ bind(&runtime);
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__ SmiTag(r4);
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__ LoadSmiLiteral(r5, Smi::FromInt(AllocateTargetSpace::encode(OLD_SPACE)));
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__ Push(r4, r5);
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__ LoadSmiLiteral(cp, Smi::FromInt(0));
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__ TailCallRuntime(Runtime::kAllocateInTargetSpace);
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}
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void Builtins::Generate_ArgumentsAdaptorTrampoline(MacroAssembler* masm) {
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// ----------- S t a t e -------------
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@ -243,13 +243,6 @@ void AllocateHeapNumberDescriptor::InitializePlatformSpecific(
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SIMD128_TYPES(SIMD128_ALLOC_DESC)
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#undef SIMD128_ALLOC_DESC
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void AllocateDescriptor::InitializePlatformSpecific(
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CallInterfaceDescriptorData* data) {
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Register registers[] = {r3};
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data->InitializePlatformSpecific(arraysize(registers), registers);
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}
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void ArrayConstructorConstantArgCountDescriptor::InitializePlatformSpecific(
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CallInterfaceDescriptorData* data) {
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// register state
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@ -19,6 +19,7 @@ const Register kReturnRegister1 = {Register::kCode_r4};
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const Register kReturnRegister2 = {Register::kCode_r5};
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const Register kJSFunctionRegister = {Register::kCode_r4};
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const Register kContextRegister = {Register::kCode_r30};
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const Register kAllocateSizeRegister = {Register::kCode_r4};
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const Register kInterpreterAccumulatorRegister = {Register::kCode_r3};
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const Register kInterpreterBytecodeOffsetRegister = {Register::kCode_r15};
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const Register kInterpreterBytecodeArrayRegister = {Register::kCode_r16};
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