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[mips32][cleanup] Eliminate non-const reference parameters

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Fix build errors introduced by

commit af063685fe

and not fully fixed by

commit db3cc4a247

Change-Id: Ifdc92f5d55061670127999058d374914985df762
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1795643
Reviewed-by: Clemens Hammacher <clemensh@chromium.org>
Commit-Queue: Mu Tao <pamilty@gmail.com>
Auto-Submit: Mu Tao <pamilty@gmail.com>
Cr-Commit-Position: refs/heads/master@{#63665}
This commit is contained in:
Mu Tao 2019-09-10 20:40:10 +08:00 committed by Commit Bot
parent cad71bef09
commit 99983ce362
3 changed files with 19 additions and 18 deletions
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2
src/codegen/mips/assembler-mips-inl.h
View File

@ -133,7 +133,7 @@ void Assembler::set_target_internal_reference_encoded_at(Address pc,
if (Assembler::IsJicOrJialc(instr2)) {
// Encoded internal references are lui/jic load of 32-bit absolute address.
uint32_t lui_offset_u, jic_offset_u;
Assembler::UnpackTargetAddressUnsigned(imm, lui_offset_u, jic_offset_u);
Assembler::UnpackTargetAddressUnsigned(imm, &lui_offset_u, &jic_offset_u);
Assembler::instr_at_put(pc + 0 * kInstrSize, instr1 | lui_offset_u);
Assembler::instr_at_put(pc + 1 * kInstrSize, instr2 | jic_offset_u);

27
src/codegen/mips/assembler-mips.cc
View File

@ -977,7 +977,7 @@ void Assembler::target_at_put(int32_t pos, int32_t target_pos,
if (IsJicOrJialc(instr2)) {
uint32_t lui_offset_u, jic_offset_u;
UnpackTargetAddressUnsigned(imm, lui_offset_u, jic_offset_u);
UnpackTargetAddressUnsigned(imm, &lui_offset_u, &jic_offset_u);
instr_at_put(pos + 0 * kInstrSize, instr1 | lui_offset_u);
instr_at_put(pos + 1 * kInstrSize, instr2 | jic_offset_u);
} else {
@ -2044,31 +2044,31 @@ void Assembler::AdjustBaseAndOffset(MemOperand* src,
void Assembler::lb(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(LB, source.rm(), rd, source.offset());
}
void Assembler::lbu(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(LBU, source.rm(), rd, source.offset());
}
void Assembler::lh(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(LH, source.rm(), rd, source.offset());
}
void Assembler::lhu(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(LHU, source.rm(), rd, source.offset());
}
void Assembler::lw(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(LW, source.rm(), rd, source.offset());
}
@ -2088,19 +2088,19 @@ void Assembler::lwr(Register rd, const MemOperand& rs) {
void Assembler::sb(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(SB, source.rm(), rd, source.offset());
}
void Assembler::sh(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(SH, source.rm(), rd, source.offset());
}
void Assembler::sw(Register rd, const MemOperand& rs) {
MemOperand source = rs;
AdjustBaseAndOffset(source);
AdjustBaseAndOffset(&source);
GenInstrImmediate(SW, source.rm(), rd, source.offset());
}
@ -2385,13 +2385,13 @@ void Assembler::seb(Register rd, Register rt) {
// Load, store, move.
void Assembler::lwc1(FPURegister fd, const MemOperand& src) {
MemOperand tmp = src;
AdjustBaseAndOffset(tmp);
AdjustBaseAndOffset(&tmp);
GenInstrImmediate(LWC1, tmp.rm(), fd, tmp.offset());
}
void Assembler::swc1(FPURegister fd, const MemOperand& src) {
MemOperand tmp = src;
AdjustBaseAndOffset(tmp);
AdjustBaseAndOffset(&tmp);
GenInstrImmediate(SWC1, tmp.rm(), fd, tmp.offset());
}
@ -3473,7 +3473,8 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, Address pc,
if (IsJicOrJialc(instr2)) {
uint32_t lui_offset_u, jic_offset_u;
Assembler::UnpackTargetAddressUnsigned(imm, lui_offset_u, jic_offset_u);
Assembler::UnpackTargetAddressUnsigned(imm,
&lui_offset_u, &jic_offset_u);
instr_at_put(pc + 0 * kInstrSize, instr1 | lui_offset_u);
instr_at_put(pc + 1 * kInstrSize, instr2 | jic_offset_u);
} else {
@ -3717,7 +3718,7 @@ void Assembler::set_target_value_at(Address pc, uint32_t target,
if (IsJicOrJialc(instr2)) {
// Must use 2 instructions to insure patchable code => use lui and jic
uint32_t lui_offset, jic_offset;
Assembler::UnpackTargetAddressUnsigned(target, lui_offset, jic_offset);
Assembler::UnpackTargetAddressUnsigned(target, &lui_offset, &jic_offset);
instr1 &= ~kImm16Mask;
instr2 &= ~kImm16Mask;

8
src/codegen/mips/macro-assembler-mips.cc
View File

@ -3751,8 +3751,8 @@ void TurboAssembler::Jump(Register target, const Operand& offset,
if (IsMipsArchVariant(kMips32r6) && bd == PROTECT &&
!is_int16(offset.immediate())) {
uint32_t aui_offset, jic_offset;
Assembler::UnpackTargetAddressUnsigned(offset.immediate(), aui_offset,
jic_offset);
Assembler::UnpackTargetAddressUnsigned(offset.immediate(), &aui_offset,
&jic_offset);
RecordRelocInfo(RelocInfo::EXTERNAL_REFERENCE, offset.immediate());
aui(target, target, aui_offset);
if (cond == cc_always) {
@ -3790,7 +3790,7 @@ void TurboAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,
// This is not an issue, t9 is expected to be clobbered anyway.
if (IsMipsArchVariant(kMips32r6) && bd == PROTECT) {
uint32_t lui_offset, jic_offset;
UnpackTargetAddressUnsigned(target, lui_offset, jic_offset);
UnpackTargetAddressUnsigned(target, &lui_offset, &jic_offset);
if (MustUseReg(rmode)) {
RecordRelocInfo(rmode, target);
}
@ -3940,7 +3940,7 @@ void TurboAssembler::Call(Address target, RelocInfo::Mode rmode, Condition cond,
int32_t target_int = static_cast<int32_t>(target);
if (IsMipsArchVariant(kMips32r6) && bd == PROTECT && cond == cc_always) {
uint32_t lui_offset, jialc_offset;
UnpackTargetAddressUnsigned(target_int, lui_offset, jialc_offset);
UnpackTargetAddressUnsigned(target_int, &lui_offset, &jialc_offset);
if (MustUseReg(rmode)) {
RecordRelocInfo(rmode, target_int);
}