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[turbofan] Remove Instruction::IsControl() and Instruction::MarkAsControl()

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R=dcarney@chromium.org
BUG=

Review URL: https://codereview.chromium.org/1031803004

Cr-Commit-Position: refs/heads/master@{#27409}
This commit is contained in:
titzer 2015-03-24 07:05:21 -07:00 committed by Commit bot
parent 97eb0a0059
commit 9ac4ab799c
14 changed files with 66 additions and 111 deletions
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27
src/compiler/arm/instruction-selector-arm.cc
View File

@ -239,9 +239,8 @@ void VisitBinop(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(outputs), output_count);
DCHECK_NE(kMode_None, AddressingModeField::decode(opcode));
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -579,9 +578,8 @@ void VisitShift(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(outputs), output_count);
DCHECK_NE(kMode_None, AddressingModeField::decode(opcode));
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -1103,8 +1101,7 @@ void VisitFloat64Compare(InstructionSelector* selector, Node* node,
if (cont->IsBranch()) {
selector->Emit(cont->Encode(kArmVcmpF64), g.NoOutput(),
g.UseRegister(m.left().node()), rhs,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
selector->Emit(cont->Encode(kArmVcmpF64),
@ -1151,9 +1148,8 @@ void VisitWordCompare(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(inputs), input_count);
DCHECK_GE(arraysize(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -1258,8 +1254,7 @@ void VisitWordCompareZero(InstructionSelector* selector, Node* user,
InstructionOperand const value_operand = g.UseRegister(value);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), value_operand, value_operand,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
value_operand);
@ -1316,8 +1311,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
DCHECK_LT(value + 2, input_count);
inputs[value + 2] = g.Label(branch);
}
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
return;
}
@ -1332,8 +1326,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
inputs[index * 2 + 2 + 1] = g.Label(branch);
}
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
}

22
src/compiler/arm64/instruction-selector-arm64.cc
View File

@ -249,9 +249,8 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(inputs), input_count);
DCHECK_GE(arraysize(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -1230,8 +1229,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
opcode = cont->Encode(opcode);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), left, right,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
@ -1410,8 +1408,7 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
g.UseRegister(m.left().node()),
g.TempImmediate(
base::bits::CountTrailingZeros32(m.right().Value())),
g.Label(cont.true_block()),
g.Label(cont.false_block()))->MarkAsControl();
g.Label(cont.true_block()), g.Label(cont.false_block()));
return;
}
return VisitWordCompare(this, value, kArm64Tst32, &cont, true,
@ -1428,8 +1425,7 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
g.UseRegister(m.left().node()),
g.TempImmediate(
base::bits::CountTrailingZeros64(m.right().Value())),
g.Label(cont.true_block()),
g.Label(cont.false_block()))->MarkAsControl();
g.Label(cont.true_block()), g.Label(cont.false_block()));
return;
}
return VisitWordCompare(this, value, kArm64Tst, &cont, true,
@ -1443,7 +1439,7 @@ void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
// Branch could not be combined with a compare, compare against 0 and branch.
Emit(cont.Encode(kArm64CompareAndBranch32), g.NoOutput(),
g.UseRegister(value), g.Label(cont.true_block()),
g.Label(cont.false_block()))->MarkAsControl();
g.Label(cont.false_block()));
}
@ -1487,8 +1483,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
DCHECK_LT(value + 2, input_count);
inputs[value + 2] = g.Label(branch);
}
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
return;
}
@ -1503,8 +1498,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
inputs[index * 2 + 2 + 1] = g.Label(branch);
}
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
}

16
src/compiler/ia32/instruction-selector-ia32.cc
View File

@ -375,9 +375,8 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(inputs), input_count);
DCHECK_GE(arraysize(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -823,8 +822,7 @@ void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
IA32OperandGenerator g(selector);
if (cont->IsBranch()) {
selector->Emit(cont->Encode(opcode), g.NoOutput(), left, right,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
// TODO(titzer): Needs byte register.
@ -889,7 +887,7 @@ void VisitWordCompare(InstructionSelector* selector, Node* node,
InstructionCode opcode = cont->Encode(kIA32StackCheck);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
selector->Emit(opcode, g.DefineAsRegister(cont->result()));
@ -1031,8 +1029,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
DCHECK_LT(value + 2, input_count);
inputs[value + 2] = g.Label(branch);
}
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
return;
}
@ -1047,8 +1044,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
inputs[index * 2 + 2 + 1] = g.Label(branch);
}
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
}

2
src/compiler/instruction-selector.cc
View File

@ -961,7 +961,7 @@ void InstructionSelector::VisitConstant(Node* node) {
void InstructionSelector::VisitGoto(BasicBlock* target) {
// jump to the next block.
OperandGenerator g(this);
Emit(kArchJmp, g.NoOutput(), g.Label(target))->MarkAsControl();
Emit(kArchJmp, g.NoOutput(), g.Label(target));
}

5
src/compiler/instruction.cc
View File

@ -109,8 +109,7 @@ MoveOperands* ParallelMove::PrepareInsertAfter(MoveOperands* move) const {
Instruction::Instruction(InstructionCode opcode)
: opcode_(opcode),
bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) |
TempCountField::encode(0) | IsCallField::encode(false) |
IsControlField::encode(false)),
TempCountField::encode(0) | IsCallField::encode(false)),
pointer_map_(NULL) {}
@ -122,7 +121,7 @@ Instruction::Instruction(InstructionCode opcode, size_t output_count,
bit_field_(OutputCountField::encode(output_count) |
InputCountField::encode(input_count) |
TempCountField::encode(temp_count) |
IsCallField::encode(false) | IsControlField::encode(false)),
IsCallField::encode(false)),
pointer_map_(NULL) {
size_t offset = 0;
for (size_t i = 0; i < output_count; ++i) {

10
src/compiler/instruction.h
View File

@ -513,7 +513,7 @@ class Instruction {
return FlagsConditionField::decode(opcode());
}
// TODO(titzer): make control and call into flags.
// TODO(titzer): make call into a flags.
static Instruction* New(Zone* zone, InstructionCode opcode) {
return New(zone, opcode, 0, NULL, 0, NULL, 0, NULL);
}
@ -535,17 +535,10 @@ class Instruction {
opcode, output_count, outputs, input_count, inputs, temp_count, temps);
}
// TODO(titzer): another holdover from lithium days; register allocator
// should not need to know about control instructions.
Instruction* MarkAsControl() {
bit_field_ = IsControlField::update(bit_field_, true);
return this;
}
Instruction* MarkAsCall() {
bit_field_ = IsCallField::update(bit_field_, true);
return this;
}
bool IsControl() const { return IsControlField::decode(bit_field_); }
bool IsCall() const { return IsCallField::decode(bit_field_); }
bool NeedsPointerMap() const { return IsCall(); }
bool HasPointerMap() const { return pointer_map_ != NULL; }
@ -588,7 +581,6 @@ class Instruction {
typedef BitField<size_t, 8, 16> InputCountField;
typedef BitField<size_t, 24, 6> TempCountField;
typedef BitField<bool, 30, 1> IsCallField;
typedef BitField<bool, 31, 1> IsControlField;
InstructionCode opcode_;
uint32_t bit_field_;

17
src/compiler/mips/instruction-selector-mips.cc
View File

@ -114,9 +114,8 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(inputs), input_count);
DCHECK_GE(arraysize(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -628,8 +627,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
opcode = cont->Encode(opcode);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), left, right,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
// TODO(plind): Revisit and test this path.
@ -758,8 +756,7 @@ void VisitWordCompareZero(InstructionSelector* selector, Node* user,
InstructionOperand const value_operand = g.UseRegister(value);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), value_operand, g.TempImmediate(0),
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
g.TempImmediate(0));
@ -813,8 +810,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
DCHECK_LT(value + 2, input_count);
inputs[value + 2] = g.Label(branch);
}
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
return;
}
@ -829,8 +825,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
inputs[index * 2 + 2 + 1] = g.Label(branch);
}
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
}

17
src/compiler/mips64/instruction-selector-mips64.cc
View File

@ -118,9 +118,8 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(inputs), input_count);
DCHECK_GE(arraysize(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -778,8 +777,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
opcode = cont->Encode(opcode);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), left, right,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
@ -842,8 +840,7 @@ void EmitWordCompareZero(InstructionSelector* selector, Node* value,
InstructionOperand const value_operand = g.UseRegister(value);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), value_operand, g.TempImmediate(0),
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
selector->Emit(opcode, g.DefineAsRegister(cont->result()), value_operand,
g.TempImmediate(0));
@ -998,8 +995,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
DCHECK_LT(value + 2, input_count);
inputs[value + 2] = g.Label(branch);
}
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
return;
}
@ -1014,8 +1010,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
inputs[index * 2 + 2 + 1] = g.Label(branch);
}
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
}

14
src/compiler/ppc/instruction-selector-ppc.cc
View File

@ -132,9 +132,8 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(inputs), input_count);
DCHECK_GE(arraysize(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -1046,8 +1045,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
opcode = cont->Encode(opcode);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), left, right,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
@ -1291,8 +1289,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
DCHECK_LT(value + 2, input_count);
inputs[value + 2] = g.Label(branch);
}
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
return;
}
@ -1307,8 +1304,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
inputs[index * 2 + 2 + 1] = g.Label(branch);
}
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
}

7
src/compiler/register-allocator.cc
View File

@ -2447,10 +2447,11 @@ LiveRange* RegisterAllocator::SplitRangeAt(LiveRange* range,
if (pos.Value() <= range->Start().Value()) return range;
// We can't properly connect liveranges if split occured at the end
// of control instruction.
// We can't properly connect liveranges if splitting occurred at the end
// a block.
DCHECK(pos.IsInstructionStart() ||
!InstructionAt(pos.InstructionIndex())->IsControl());
(code()->GetInstructionBlock(pos.InstructionIndex()))
->last_instruction_index() != pos.InstructionIndex());
int vreg = GetVirtualRegister();
auto result = LiveRangeFor(vreg);

16
src/compiler/x64/instruction-selector-x64.cc
View File

@ -351,9 +351,8 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
DCHECK_GE(arraysize(inputs), input_count);
DCHECK_GE(arraysize(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
if (cont->IsBranch()) instr->MarkAsControl();
selector->Emit(cont->Encode(opcode), output_count, outputs, input_count,
inputs);
}
@ -1033,8 +1032,7 @@ void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
opcode = cont->Encode(opcode);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), left, right,
g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->true_block()), g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
@ -1089,7 +1087,7 @@ void VisitWord64Compare(InstructionSelector* selector, Node* node,
InstructionCode opcode = cont->Encode(kX64StackCheck);
if (cont->IsBranch()) {
selector->Emit(opcode, g.NoOutput(), g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
g.Label(cont->false_block()));
} else {
DCHECK(cont->IsSet());
selector->Emit(opcode, g.DefineAsRegister(cont->result()));
@ -1265,8 +1263,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
DCHECK_LT(value + 2, input_count);
inputs[value + 2] = g.Label(branch);
}
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchTableSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
return;
}
@ -1281,8 +1278,7 @@ void InstructionSelector::VisitSwitch(Node* node, BasicBlock* default_branch,
inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
inputs[index * 2 + 2 + 1] = g.Label(branch);
}
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr)
->MarkAsControl();
Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
}

8
test/cctest/compiler/test-instruction.cc
View File

@ -200,7 +200,7 @@ TEST(InstructionIsGapAt) {
R.allocCode();
TestInstr* i0 = TestInstr::New(R.zone(), 100);
TestInstr* g = TestInstr::New(R.zone(), 103)->MarkAsControl();
TestInstr* g = TestInstr::New(R.zone(), 103);
R.code->StartBlock(R.RpoFor(b0));
R.code->AddInstruction(i0);
R.code->AddInstruction(g);
@ -223,14 +223,14 @@ TEST(InstructionIsGapAt2) {
R.allocCode();
TestInstr* i0 = TestInstr::New(R.zone(), 100);
TestInstr* g = TestInstr::New(R.zone(), 103)->MarkAsControl();
TestInstr* g = TestInstr::New(R.zone(), 103);
R.code->StartBlock(R.RpoFor(b0));
R.code->AddInstruction(i0);
R.code->AddInstruction(g);
R.code->EndBlock(R.RpoFor(b0));
TestInstr* i1 = TestInstr::New(R.zone(), 102);
TestInstr* g1 = TestInstr::New(R.zone(), 104)->MarkAsControl();
TestInstr* g1 = TestInstr::New(R.zone(), 104);
R.code->StartBlock(R.RpoFor(b1));
R.code->AddInstruction(i1);
R.code->AddInstruction(g1);
@ -251,7 +251,7 @@ TEST(InstructionAddGapMove) {
R.allocCode();
TestInstr* i0 = TestInstr::New(R.zone(), 100);
TestInstr* g = TestInstr::New(R.zone(), 103)->MarkAsControl();
TestInstr* g = TestInstr::New(R.zone(), 103);
R.code->StartBlock(R.RpoFor(b0));
R.code->AddInstruction(i0);
R.code->AddInstruction(g);

8
test/cctest/compiler/test-jump-threading.cc
View File

@ -30,8 +30,8 @@ class TestCode : public HandleAndZoneScope {
int Jump(int target) {
Start();
InstructionOperand ops[] = {UseRpo(target)};
sequence_.AddInstruction(Instruction::New(main_zone(), kArchJmp, 0, NULL, 1,
ops, 0, NULL)->MarkAsControl());
sequence_.AddInstruction(
Instruction::New(main_zone(), kArchJmp, 0, NULL, 1, ops, 0, NULL));
int pos = static_cast<int>(sequence_.instructions().size() - 1);
End();
return pos;
@ -45,8 +45,8 @@ class TestCode : public HandleAndZoneScope {
InstructionOperand ops[] = {UseRpo(ttarget), UseRpo(ftarget)};
InstructionCode code = 119 | FlagsModeField::encode(kFlags_branch) |
FlagsConditionField::encode(kEqual);
sequence_.AddInstruction(Instruction::New(main_zone(), code, 0, NULL, 2,
ops, 0, NULL)->MarkAsControl());
sequence_.AddInstruction(
Instruction::New(main_zone(), code, 0, NULL, 2, ops, 0, NULL));
int pos = static_cast<int>(sequence_.instructions().size() - 1);
End();
return pos;

8
test/unittests/compiler/instruction-sequence-unittest.cc
View File

@ -290,22 +290,20 @@ Instruction* InstructionSequenceTest::EmitBranch(TestOperand input_op) {
ConvertInputOp(Imm()), ConvertInputOp(Imm())};
InstructionCode opcode = kArchJmp | FlagsModeField::encode(kFlags_branch) |
FlagsConditionField::encode(kEqual);
auto instruction =
NewInstruction(opcode, 0, nullptr, 4, inputs)->MarkAsControl();
auto instruction = NewInstruction(opcode, 0, nullptr, 4, inputs);
return AddInstruction(instruction);
}
Instruction* InstructionSequenceTest::EmitFallThrough() {
auto instruction = NewInstruction(kArchNop, 0, nullptr)->MarkAsControl();
auto instruction = NewInstruction(kArchNop, 0, nullptr);
return AddInstruction(instruction);
}
Instruction* InstructionSequenceTest::EmitJump() {
InstructionOperand inputs[1]{ConvertInputOp(Imm())};
auto instruction =
NewInstruction(kArchJmp, 0, nullptr, 1, inputs)->MarkAsControl();
auto instruction = NewInstruction(kArchJmp, 0, nullptr, 1, inputs);
return AddInstruction(instruction);
}