PPC/s390: [wasm-simd] Support returning Simd128 on caller's stack

Port 360c9294a8

Original Commit Message:

    In Liftoff, we were missing kS128 cases to load to/from stack.

    For the x64 and ARM64 instruction selector, the calculation of
    reverse_slot is incorrect for 128-bit values:

    - reverse_slot += 2 (size of 128-bit values, 2 pointers)
    - this copies from slot -2 into register
    - but the value starts at slot -1, it occupies slots -1 and -2
    - we end up copying slot -2 (most significant half) of the register, and
    also slot -3, which is where rsi was store (Wasm instance addr)
    - the test ends up with a different result every time

    The calculation of reverse_slot is changed to follow how ia32 and ARM
    does it, which is to start with

    - reverse_slot = 0
    - in the code-generator, add 1 to the slot
    - then after emitting Peek operation, reverse_slot += 2

    The fixes for x64 and ARM64 are in both instruction-selector and
    code-generator.

    ia32 and ARM didn't support writing kSimd128 values yet, it was only a
    missing check in code-generator, so add that in.

    For ARM, the codegen is more involved, vld1 does not support addressing
    with an offset, so we have to do the addition into a scratch register.

    Also adding a test for returning multiple v128. V128 is not exposed to
    JavaScript, so we use a Wasm function call, and then an involved chain
    of extract lanes, returning 6 i32 which we verify the values of. It
    extracts the first and last lane of the i32x4 value in order to catch
    bugs where we write or read to a wrong stack slot (off by 1).

    The simd-scalar-lowering for kCall was only handling single s128 return,
    we adopt the way i64-lowering handles kCall, so that is can now handle
    any kinds of calls with s128 in the descriptor.

R=zhin@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N

Change-Id: I1ad9595d7820f04687c9d79941ad04c6eb207897
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2363118
Reviewed-by: Junliang Yan <jyan@ca.ibm.com>
Reviewed-by: Zhi An Ng <zhin@chromium.org>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#69461}

src/compiler/backend/ppc/code-generator-ppc.cc

@@ -1224,17 +1224,20 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
               kSpeculationPoisonRegister);
       break;
     case kPPC_Peek: {
-      // The incoming value is 0-based, but we need a 1-based value.
-      int reverse_slot = i.InputInt32(0) + 1;
+      int reverse_slot = i.InputInt32(0);
       int offset =
           FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
       if (instr->OutputAt(0)->IsFPRegister()) {
         LocationOperand* op = LocationOperand::cast(instr->OutputAt(0));
         if (op->representation() == MachineRepresentation::kFloat64) {
           __ LoadDouble(i.OutputDoubleRegister(), MemOperand(fp, offset), r0);
-        } else {
-          DCHECK_EQ(MachineRepresentation::kFloat32, op->representation());
+        } else if (op->representation() == MachineRepresentation::kFloat32) {
           __ LoadFloat32(i.OutputFloatRegister(), MemOperand(fp, offset), r0);
+        } else {
+          DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
+          __ mov(ip, Operand(offset));
+          __ LoadSimd128(i.OutputSimd128Register(), MemOperand(fp, ip), r0,
+                         kScratchDoubleReg);
         }
       } else {
         __ LoadP(i.OutputRegister(), MemOperand(fp, offset), r0);

src/compiler/backend/ppc/instruction-selector-ppc.cc

@@ -2407,7 +2407,7 @@ void InstructionSelector::EmitPrepareResults(
     Node* node) {
   PPCOperandGenerator g(this);
 
-  int reverse_slot = 0;
+  int reverse_slot = 1;
   for (PushParameter output : *results) {
     if (!output.location.IsCallerFrameSlot()) continue;
     // Skip any alignment holes in nodes.
@@ -2417,6 +2417,8 @@ void InstructionSelector::EmitPrepareResults(
         MarkAsFloat32(output.node);
       } else if (output.location.GetType() == MachineType::Float64()) {
         MarkAsFloat64(output.node);
+      } else if (output.location.GetType() == MachineType::Simd128()) {
+        MarkAsSimd128(output.node);
       }
       Emit(kPPC_Peek, g.DefineAsRegister(output.node),
            g.UseImmediate(reverse_slot));

src/compiler/backend/s390/code-generator-s390.cc

@@ -1674,17 +1674,19 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ AndP(i.InputRegister(0), kSpeculationPoisonRegister);
       break;
     case kS390_Peek: {
-      // The incoming value is 0-based, but we need a 1-based value.
-      int reverse_slot = i.InputInt32(0) + 1;
+      int reverse_slot = i.InputInt32(0);
       int offset =
           FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
       if (instr->OutputAt(0)->IsFPRegister()) {
         LocationOperand* op = LocationOperand::cast(instr->OutputAt(0));
         if (op->representation() == MachineRepresentation::kFloat64) {
           __ LoadDouble(i.OutputDoubleRegister(), MemOperand(fp, offset));
-        } else {
-          DCHECK_EQ(MachineRepresentation::kFloat32, op->representation());
+        } else if (op->representation() == MachineRepresentation::kFloat32) {
           __ LoadFloat32(i.OutputFloatRegister(), MemOperand(fp, offset));
+        } else {
+          DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
+          __ LoadSimd128(i.OutputSimd128Register(), MemOperand(fp, offset),
+                         kScratchReg);
         }
       } else {
         __ LoadP(i.OutputRegister(), MemOperand(fp, offset));

src/compiler/backend/s390/instruction-selector-s390.cc

@@ -2901,7 +2901,7 @@ void InstructionSelector::EmitPrepareResults(
     Node* node) {
   S390OperandGenerator g(this);
 
-  int reverse_slot = 0;
+  int reverse_slot = 1;
   for (PushParameter output : *results) {
     if (!output.location.IsCallerFrameSlot()) continue;
     // Skip any alignment holes in nodes.
@@ -2911,6 +2911,8 @@ void InstructionSelector::EmitPrepareResults(
         MarkAsFloat32(output.node);
       } else if (output.location.GetType() == MachineType::Float64()) {
         MarkAsFloat64(output.node);
+      } else if (output.location.GetType() == MachineType::Simd128()) {
+        MarkAsSimd128(output.node);
       }
       Emit(kS390_Peek, g.DefineAsRegister(output.node),
            g.UseImmediate(reverse_slot));